18522596. SWITCHED CAPACITOR INTEGRATOR CIRCUIT WITH REFERENCE, OFFSET CANCELLATION AND DIFFERENTIAL TO SINGLE-ENDED CONVERSION simplified abstract (TEXAS INSTRUMENTS INCORPORATED)

From WikiPatents
Jump to navigation Jump to search

SWITCHED CAPACITOR INTEGRATOR CIRCUIT WITH REFERENCE, OFFSET CANCELLATION AND DIFFERENTIAL TO SINGLE-ENDED CONVERSION

Organization Name

TEXAS INSTRUMENTS INCORPORATED

Inventor(s)

Partha Sarathi Basu of Tucson AZ (US)

Dimitar Trifonov Trifonov of Vail AZ (US)

Tony Ray Larson of Tucson AZ (US)

Chao-Hsiuan Tsay of Tucson AZ (US)

SWITCHED CAPACITOR INTEGRATOR CIRCUIT WITH REFERENCE, OFFSET CANCELLATION AND DIFFERENTIAL TO SINGLE-ENDED CONVERSION - A simplified explanation of the abstract

This abstract first appeared for US patent application 18522596 titled 'SWITCHED CAPACITOR INTEGRATOR CIRCUIT WITH REFERENCE, OFFSET CANCELLATION AND DIFFERENTIAL TO SINGLE-ENDED CONVERSION

Simplified Explanation

The dual integrator system described in the patent application consists of two integrators, an output stage, and a switching network. The first and second integrators receive a differential Hall sensor signal and a reference voltage. The first integrator outputs a signal based on the differential Hall sensor and the reference voltage, while the second integrator outputs a signal based on the differential Hall sensor signal and the reference voltage. Both integrators have offset cancellation feedback loops. The switching network alternates which integrator is coupled to the output stage.

  • The system includes two integrators, an output stage, and a switching network.
  • The first and second integrators receive a differential Hall sensor signal and a reference voltage.
  • The first integrator outputs a signal based on the differential Hall sensor and the reference voltage.
  • The second integrator outputs a signal based on the differential Hall sensor signal and the reference voltage.
  • Both integrators have offset cancellation feedback loops.
  • The switching network alternates which integrator is coupled to the output stage.

Potential Applications

The technology described in this patent application could be applied in:

  • Position sensing systems
  • Motor control systems
  • Robotics
  • Automotive applications

Problems Solved

This technology helps in:

  • Improving accuracy in position sensing
  • Enhancing control systems
  • Minimizing offset errors in integrator circuits

Benefits

The benefits of this technology include:

  • Increased precision in sensor signal processing
  • Reduced offset errors
  • Enhanced performance in control applications

Potential Commercial Applications

This technology has potential commercial applications in:

  • Sensor manufacturing companies
  • Control system manufacturers
  • Automotive industry
  • Robotics companies

Possible Prior Art

One possible prior art for this technology could be the use of single integrator systems in similar applications.

Unanswered Questions

How does this technology compare to existing integrator systems in terms of accuracy and efficiency?

The patent application does not provide a direct comparison with existing integrator systems, so it is unclear how this technology fares in terms of accuracy and efficiency.

What are the specific industries or sectors that would benefit the most from implementing this dual integrator system?

While the potential applications are mentioned in the article, a more detailed analysis of the industries or sectors that would benefit the most from this technology is not provided.


Original Abstract Submitted

A dual integrator system comprises two integrators, an output stage, and a switching network. The first and second integrators receive a differential Hall sensor signal and a reference voltage. The first integrator outputs a first integrator signal based on the differential Hall sensor and the reference voltage. The second integrator outputs a second integrator signal based on the differential Hall sensor signal and the reference voltage. The first integrator comprises a first offset cancellation feedback loop, and the second integrator comprises a second offset cancellation feedback loop. The switching network is coupled to the first and second integrators and to the output stage, and alternates which of the first and second integrators is coupled to the output stage. In some embodiments, the first and second integrators each perform a reset operation, a sampling operation, an integration operation, a differential to single-ended conversion operation, and a holding operation.