18518142. SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENT DOPING TYPES simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

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SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENT DOPING TYPES

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Meng-Sheng Chang of Chubei City (TW)

Chia-En Huang of Xinfeng Township (TW)

Chun Chung Su of New Taipei City (TW)

Wen-Hsing Hsieh of Hsinchu City (TW)

SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENT DOPING TYPES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18518142 titled 'SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENT DOPING TYPES

Simplified Explanation

The semiconductor device described in the patent application consists of first and second nanostructures that are vertically separated, each wrapped by a gate structure. Drain/source structures are connected to the ends of the nanostructures, with different doping types for each structure.

  • First nanostructures vertically separated
  • First gate structure wrapping around first nanostructures
  • Second nanostructures vertically separated
  • Second gate structure wrapping around second nanostructures
  • First drain/source structure connected to first end of first nanostructures
  • Second drain/source structure connected to second end of first nanostructures and first end of second nanostructures
  • Third drain/source structure connected to second end of second nanostructures
  • First doping type for first drain/source structure, second and third drain/source structures have second doping type
  • First doping type is opposite to second doping type

Potential Applications

  • Advanced semiconductor devices
  • Nanotechnology
  • Electronics industry

Problems Solved

  • Improved performance of semiconductor devices
  • Enhanced efficiency in electronic circuits
  • Better control over doping types in drain/source structures

Benefits

  • Increased functionality in electronic devices
  • Higher speed and performance
  • Potential for smaller and more efficient devices


Original Abstract Submitted

A semiconductor device includes first nanostructures vertically separated from one another, a first gate structure wrapping around each of the first nanostructures, and second nanostructures vertically separated from one another. The semiconductor device also includes a second gate structure wrapping around the second nanostructures, a first drain/source structure coupled to a first end of the first nanostructures, a second drain/source structure coupled to both of a second end of the first nanostructures and a first end of the second nanostructures, and a third drain/source structure coupled to a second end of the second nanostructures. The first drain/source structure has a first doping type, the second and third drain/source structures have a second doping type, and the first doping type is opposite to the second doping type.