18518081. Metal Contact Structure and Method of Forming the Same in a Semiconductor Device simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
Metal Contact Structure and Method of Forming the Same in a Semiconductor Device
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Sheng-Hsuan Lin of Zhubei (TW)
Chih-Wei Chang of Hsinchu (TW)
Metal Contact Structure and Method of Forming the Same in a Semiconductor Device - A simplified explanation of the abstract
This abstract first appeared for US patent application 18518081 titled 'Metal Contact Structure and Method of Forming the Same in a Semiconductor Device
Simplified Explanation
The semiconductor device described in the patent application comprises a silicide layer, a metal plug, a dielectric layer, a first metal layer, a second metal layer, and an amorphous layer.
- The semiconductor device includes a silicide layer on a substrate.
- A metal plug is located in an opening defined by a dielectric layer over the substrate.
- A first metal layer is present between the metal plug and the dielectric layer, as well as between the metal plug and the silicide layer.
- A second metal layer is positioned over the first metal layer.
- An amorphous layer is situated between the first metal layer and the second metal layer.
Potential Applications
- This technology can be used in the manufacturing of advanced semiconductor devices.
- It can improve the performance and reliability of integrated circuits.
Problems Solved
- Enhances the electrical conductivity and stability of the semiconductor device.
- Provides better integration of different metal layers in the device structure.
Benefits
- Increased efficiency and functionality of semiconductor devices.
- Improved overall performance and durability of integrated circuits.
Original Abstract Submitted
A semiconductor device and method of formation are provided. The semiconductor device comprises a silicide layer over a substrate, a metal plug in an opening defined by a dielectric layer over the substrate, a first metal layer between the metal plug and the dielectric layer and between the metal plug and the silicide layer, a second metal layer over the first metal layer, and an amorphous layer between the first metal layer and the second metal layer.