18517354. SEMICONDUCTOR DEVICE INCLUDING DEEP VIAS simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

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SEMICONDUCTOR DEVICE INCLUDING DEEP VIAS

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Ta-Pen Guo of Hsinchu (TW)

Chien-Ying Chen of Hsinchu (TW)

Li-Chun Tien of Hsinchu (TW)

Lee-Chung Lu of Hsinchu (TW)

SEMICONDUCTOR DEVICE INCLUDING DEEP VIAS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18517354 titled 'SEMICONDUCTOR DEVICE INCLUDING DEEP VIAS

Simplified Explanation

The semiconductor device described in the patent application includes a transistor layer, multiple via layers, and a metallization layer with conductors oriented in a specific direction.

  • The device consists of a transistor layer, first via layer, first metallization layer, second via layer, and a deep via connecting them.
  • The first metallization layer contains conductors aligned predominantly in a single direction.
  • The deep via within the first metallization layer is significantly smaller in size compared to the length of the conductors in the same layer.

Potential Applications

  • This technology can be utilized in the manufacturing of high-density integrated circuits.
  • It can be applied in the development of advanced semiconductor devices for various electronic applications.

Problems Solved

  • Enables efficient routing of electrical signals in complex semiconductor devices.
  • Facilitates the integration of multiple components in a compact space.

Benefits

  • Improved performance and reliability of semiconductor devices.
  • Enhanced functionality and miniaturization of electronic products.
  • Cost-effective production of high-performance integrated circuits.


Original Abstract Submitted

A semiconductor device includes a transistor layer, a first via layer over the transistor layer, a first metallization layer over the first via layer, the first metallization layer including first conductors having long axes extending substantially in a first direction, a second via layer over the first metallization layer, and a conductive deep via extending in the second via layer, the first metallization layer, and the first via layer. The first conductors represent a majority of conductive material in the first metallization layer, and a size of the deep via in the first direction in the first metallization layer is substantially less than a minimum length of the first conductors in the first metallization layer.