18509654. SYSTEM AND METHOD FOR MODELING A SEMICONDUCTOR FABRICATION PROCESS simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
SYSTEM AND METHOD FOR MODELING A SEMICONDUCTOR FABRICATION PROCESS
Organization Name
Inventor(s)
Moonhyun Cha of Yongin-si (KR)
Changwook Jeong of Hwaseong-si (KR)
SYSTEM AND METHOD FOR MODELING A SEMICONDUCTOR FABRICATION PROCESS - A simplified explanation of the abstract
This abstract first appeared for US patent application 18509654 titled 'SYSTEM AND METHOD FOR MODELING A SEMICONDUCTOR FABRICATION PROCESS
Simplified Explanation
The system described in the abstract utilizes machine learning models to analyze images of design patterns and physical patterns in a semiconductor fabrication process. The first processor trains the ML model using pairs of images, while the second processor generates output data based on input images representing design patterns and physical patterns.
- Utilizes machine learning models to analyze images of design patterns and physical patterns
- Trains ML model using pairs of images of design pattern samples and physical pattern samples
- Generates output data defining physical patterns and design patterns based on input images
- Improves accuracy and efficiency in semiconductor fabrication processes
Potential Applications
- Semiconductor manufacturing
- Quality control in fabrication processes
- Pattern recognition in industrial settings
Problems Solved
- Enhances accuracy in pattern recognition
- Streamlines semiconductor fabrication processes
- Improves quality control measures
Benefits
- Increased efficiency in semiconductor manufacturing
- Enhanced accuracy in pattern analysis
- Cost-effective solution for quality control in fabrication processes
Original Abstract Submitted
A system for modeling a semiconductor fabrication process includes at least one first processor and at least one second processor. The at least one first processor is configured to provide at least one machine learning (ML) model, which is trained by using a plurality of pairs of images of a design pattern sample and a physical pattern sample. The physical pattern sample is formed from the design pattern sample by using the semiconductor fabrication process. The at least one second processor is configured to provide an input image representing a shape of a design pattern and/or a physical pattern to the at least one first processor and to generate output data defining the physical pattern and/or the design pattern based on an output image received from the at least one first processor.
