18492964. MEMORY WITH FRAM AND SRAM OF IC simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)
Contents
MEMORY WITH FRAM AND SRAM OF IC
Organization Name
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Inventor(s)
Han-Jong Chia of Hsinchu City (TW)
Sai-Hooi Yeong of Hsinchu County (TW)
Yu-Ming Lin of Hsinchu City (TW)
MEMORY WITH FRAM AND SRAM OF IC - A simplified explanation of the abstract
This abstract first appeared for US patent application 18492964 titled 'MEMORY WITH FRAM AND SRAM OF IC
Simplified Explanation
The abstract describes a memory system that includes both ferroelectric random access memory (FRAM) cells and static random access memory (SRAM) cells, with a controller that can access each array at different rates. Each FRAM cell contains a ferroelectric field-effect transistor (FeFET) with a gate structure consisting of a gate electrode, ferroelectric layer, first electrode, and second electrode.
- Memory system includes FRAM cells and SRAM cells
- Controller can access each array at different rates
- FRAM cells contain FeFETs with specific gate structure
- Gate structure includes gate electrode, ferroelectric layer, first electrode, and second electrode
- Potential Applications
- Embedded systems
- IoT devices
- Wearable technology
- Problems Solved
- Faster access to memory
- Improved energy efficiency
- Enhanced data retention
- Benefits
- Higher performance
- Lower power consumption
- Increased reliability
Original Abstract Submitted
Memories are provided. A memory includes a plurality of ferroelectric random access memory (FRAM) cells arranged in a first memory array, a plurality of static random access memory (SRAM) cells arranged in a second memory array, and a controller configured to access the first memory array and the second memory array with different access rate. Each of the FRAM cells includes a ferroelectric field-effect transistor (FeFET). A gate structure of the FeFET includes a gate electrode over a channel of the FeFET, a ferroelectric layer over the gate electrode, a first electrode over the gate electrode, and a second electrode over the first electrode. The ferroelectric layer is formed between the first and second electrodes.
