18485089. SHARING REGISTER FILE USAGE BETWEEN FUSED PROCESSING RESOURCES simplified abstract (Intel Corporation)

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SHARING REGISTER FILE USAGE BETWEEN FUSED PROCESSING RESOURCES

Organization Name

Intel Corporation

Inventor(s)

SUBRAMANIAM Maiyuran of Gold River CA (US)

VARGHESE George of Folsom CA (US)

JOYDEEP Ray of Folsom CA (US)

ASHUTOSH Garg of Folsom CA (US)

JORGE Parra of El Dorado Hills CA (US)

SHUBH Shah of Folsom CA (US)

SHUBRA Marwaha of Folsom CA (US)

SHARING REGISTER FILE USAGE BETWEEN FUSED PROCESSING RESOURCES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18485089 titled 'SHARING REGISTER FILE USAGE BETWEEN FUSED PROCESSING RESOURCES

Simplified Explanation

The patent application describes an apparatus with multiple processing resources, shared local memory, and a processor for matrix multiplication operations.

  • Apparatus includes multiple processing resources, shared local memory, and a processor.
  • Processor receives instruction for matrix multiplication, writes matrix data into registers, and shares data between processing resources.
  • Matrix multiplication operation is facilitated by sharing data between processing resources.

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      1. Potential Applications
  • High-performance computing
  • Artificial intelligence and machine learning algorithms
  • Signal processing applications
      1. Problems Solved
  • Efficient matrix multiplication operations
  • Optimized use of processing resources
  • Improved performance in parallel computing tasks
      1. Benefits
  • Faster execution of matrix multiplication operations
  • Enhanced scalability in processing large datasets
  • Increased efficiency in computational tasks


Original Abstract Submitted

Embodiments described herein provide an apparatus comprising a plurality of processing resources including a first processing resource and a second processing resource, a shared local memory communicatively coupled to the first processing resource and the second processing resource, and a processor to receive an instruction to initiate a matrix multiplication operation, write a first set of matrix data into a first set of registers, and share the first set of matrix data between the first processing resource and the second processing resource for use in the matrix multiplication operation. Other embodiments may be described and claimed.