18477555. CMOS CIRCUIT simplified abstract (Japan Display Inc.)
Contents
CMOS CIRCUIT
Organization Name
Inventor(s)
CMOS CIRCUIT - A simplified explanation of the abstract
This abstract first appeared for US patent application 18477555 titled 'CMOS CIRCUIT
Simplified Explanation
The abstract describes a CMOS circuit with a p-channel type transistor and an n-channel type transistor, where the transistors are complementarily connected to each other and the polycrystalline silicon layer and the oxide semiconductor layer overlap in plan view.
- The CMOS circuit includes a p-channel type transistor with a polycrystalline silicon layer.
- The CMOS circuit also includes an n-channel type transistor with an oxide semiconductor layer.
- The p-channel transistor and the n-channel transistor are complementarily connected to each other.
- The polycrystalline silicon layer and the oxide semiconductor layer overlap in plan view.
Potential Applications
This technology could be applied in integrated circuits, microprocessors, and other electronic devices requiring efficient and reliable CMOS circuits.
Problems Solved
This technology solves the problem of improving the performance and reliability of CMOS circuits by using complementarily connected transistors with overlapping layers.
Benefits
The benefits of this technology include enhanced circuit efficiency, reduced power consumption, improved signal processing capabilities, and increased overall reliability.
Potential Commercial Applications
- "Optimizing CMOS Circuits for Enhanced Performance and Reliability"
Possible Prior Art
One possible prior art could be the use of CMOS circuits with non-overlapping layers or different types of transistors that are not complementarily connected.
Unanswered Questions
How does this technology compare to traditional CMOS circuits in terms of power consumption and performance?
This article does not provide a direct comparison between this technology and traditional CMOS circuits in terms of power consumption and performance.
What are the specific design considerations needed when implementing this technology in different electronic devices?
This article does not address the specific design considerations needed when implementing this technology in different electronic devices.
Original Abstract Submitted
According to one embodiment, a CMOS circuit includes a p-channel type transistor including a polycrystalline silicon layer and an n-channel type transistor including an oxide semiconductor layer, and the p-channel transistor and the n-channel transistor are complementarily connected to each other, and the polycrystalline silicon layer and the oxide semiconductor layer overlap each other in plan view.
