18465213. MONITORING TRANSITIONS OF A CIRCUIT simplified abstract (Texas Instruments Incorporated)

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MONITORING TRANSITIONS OF A CIRCUIT

Organization Name

Texas Instruments Incorporated

Inventor(s)

RONALD Nerlich of DRESDEN (DE)

MARK Jung of MARZLING (DE)

JOHANN Zipperer of Unterschleißheim (DE)

DIETMAR Walther of ECHING (DE)

MONITORING TRANSITIONS OF A CIRCUIT - A simplified explanation of the abstract

This abstract first appeared for US patent application 18465213 titled 'MONITORING TRANSITIONS OF A CIRCUIT

Simplified Explanation

The patent application describes a circuit that includes several interconnected components for triggering a reset signal based on certain input signals and a clock signal.

  • The circuit includes a guard trigger circuit with two input nodes and an output node. The input nodes are connected to state signals, and the output node provides a trigger signal.
  • A reset synchronizer circuit is also included, which takes the trigger signal from the guard trigger circuit as input, along with a clock signal. It produces an output signal.
  • A timeout circuit is part of the circuit as well, taking the output signal from the reset synchronizer circuit and the clock signal as inputs. It generates an output signal.
  • Finally, a reset requestor circuit is included, which takes the trigger signal from the guard trigger circuit and the output signal from the timeout circuit as inputs.

Potential applications of this technology:

  • This circuit can be used in electronic devices that require a reset signal to be triggered based on certain conditions or events.
  • It can be implemented in various systems where synchronization and timing are crucial, such as communication systems, control systems, or data processing systems.

Problems solved by this technology:

  • The circuit provides a reliable and efficient way to trigger a reset signal based on specific input conditions and timing requirements.
  • It ensures that the reset signal is synchronized with the clock signal, preventing any timing issues or glitches.

Benefits of this technology:

  • The circuit offers a robust and accurate mechanism for triggering a reset signal, enhancing the overall reliability and performance of electronic devices.
  • It allows for precise control over the timing of the reset signal, ensuring that it is triggered at the desired moment.
  • The circuit can be easily integrated into existing electronic systems, providing a flexible and adaptable solution.


Original Abstract Submitted

A circuit includes a guard trigger circuit that includes a first input node adapted to be coupled to a first state signal, a second input node adapted to be coupled to a second state signal and an output node. The circuit also includes a reset synchronizer circuit that includes an input node coupled to the output node of the guard trigger circuit, a clock node adapted to be coupled to a clock signal and an output node. The circuit further includes a timeout circuit including an input node coupled to the output node of the reset synchronizer circuit, a clock node adapted to be coupled to the clock signal and an output node. The circuit still further includes a reset requestor circuit that includes a first input node coupled to the output node of the guard trigger circuit, a second node coupled to the output node of the timeout circuit.

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