18463730. MEMORY, MEMORY SYSTEM AND METHOD OF CONTROLLING STORAGE DEVICE simplified abstract (Kioxia Corporation)
Contents
MEMORY, MEMORY SYSTEM AND METHOD OF CONTROLLING STORAGE DEVICE
Organization Name
Inventor(s)
Atsushi Yamazaki of Hachioji Tokyo (JP)
MEMORY, MEMORY SYSTEM AND METHOD OF CONTROLLING STORAGE DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18463730 titled 'MEMORY, MEMORY SYSTEM AND METHOD OF CONTROLLING STORAGE DEVICE
Simplified Explanation
The memory described in the patent application includes a communication port for transmitting or receiving information, including debug data, to or from an external device. It also includes a debug port controller that can block the communication path connecting to the communication port based on authentication codes.
- The memory has a communication port for transmitting or receiving information, including debug data.
- It includes a debug port controller that can block the communication path connecting to the communication port.
- The debug port controller can receive an authentication request with a second authentication code from an external device.
- It can determine if the second authentication code matches the first authentication code.
- If the codes do not match, the communication path is blocked until authentication is successful.
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- Potential Applications
This technology could be used in secure communication systems, data transfer devices, and electronic devices requiring authentication for debugging purposes.
- Problems Solved
This technology helps prevent unauthorized access to debug data and information by requiring authentication before allowing communication with external devices.
- Benefits
- Enhanced security for sensitive information - Control over access to debug data - Protection against unauthorized debugging attempts
- Potential Commercial Applications
1. Secure data transfer devices 2. Electronic devices with sensitive information 3. Communication systems requiring authentication for debugging
- Possible Prior Art
One possible prior art for this technology could be systems that use authentication codes for access control to sensitive information or devices.
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- Unanswered Questions
- How does this technology impact the speed of communication between the memory and external devices?
The patent application does not provide information on the potential impact of the authentication process on the speed of communication. Further research or testing may be needed to determine any potential delays caused by the authentication process.
- Are there any compatibility issues with different types of external devices?
The patent application does not address potential compatibility issues with various types of external devices that may need to communicate with the memory. Additional information or testing may be required to determine if the technology is compatible with a wide range of devices.
Original Abstract Submitted
A memory having a first authentication code includes a communication port configured to transmit information including debug data to or receive the information including debug data from the external device; and a debug port controller that is usable for blocking of a communication path connecting to the communication port. The debug port controller is configured to receive an authentication request including a second authentication code from an external device, determine whether the second authentication code matches the first authentication code, and block the communication path if the second authentication code is not determined to match the first authentication code. The communication port may be configured to be disabled until the second authentication code matches the first authentication code.
