18395066. AUTOMATED DETECTION OF CASE-SPLITTING OPPORTUNITIES IN RTL simplified abstract (Intel Corporation)

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AUTOMATED DETECTION OF CASE-SPLITTING OPPORTUNITIES IN RTL

Organization Name

Intel Corporation

Inventor(s)

Samuel Coward of London (GB)

Theo Drane of El Dorado Hills CA (US)

George A. Constantinides of Santa Clara CA (US)

AUTOMATED DETECTION OF CASE-SPLITTING OPPORTUNITIES IN RTL - A simplified explanation of the abstract

This abstract first appeared for US patent application 18395066 titled 'AUTOMATED DETECTION OF CASE-SPLITTING OPPORTUNITIES IN RTL

Simplified Explanation

The technique described in the patent application is for automated detection of case-splitting opportunities in RTL to improve hardware design efficiency and avoid timing violations.

  • Analyzing a hardware description to identify critical paths in a circuit
  • Automatically detecting case-splitting opportunities within critical paths
  • Generating hardware description language for case splits with operator domain restrictions
  • Outputting a hardware description with reduced operator hardware cost for critical paths

Potential Applications

This technology can be applied in the field of hardware design automation, specifically in improving the efficiency and performance of hardware designs by optimizing critical paths.

Problems Solved

1. Timing violations in hardware designs 2. Inefficient hardware design due to lack of case-splitting optimization

Benefits

1. Improved performance of hardware designs 2. Reduction in operator hardware cost 3. Automation of case-splitting process for increased efficiency

Potential Commercial Applications

Optimizing hardware designs for various industries such as telecommunications, automotive, and consumer electronics.

Possible Prior Art

Prior art in the field of hardware design automation may include techniques for optimizing critical paths and reducing timing violations in hardware designs.

Unanswered Questions

How does this technique compare to manual case-splitting methods in terms of efficiency and accuracy?

The article does not provide a comparison between automated case-splitting and manual methods in hardware design.

What impact does this technology have on overall design time and complexity?

The article does not address the potential effects of implementing this technology on design time and complexity in hardware design processes.


Original Abstract Submitted

Described herein is a technique for automated detection of case-splitting opportunities in RTL. The techniques described herein facilitate the integration of case-splitting into a hardware design tool flow, allowing the generation of hardware designs that do not suffer from timing violations. One embodiment provides a method comprising analyzing a first hardware description in a hardware description language to identify a critical path in a circuit represented by the hardware description, automatically detecting a case-splitting opportunity within the critical path, generating hardware description language for a case split having determined operator domain restrictions, and outputting a second hardware description including the hardware description language for the case split, wherein the second hardware description has a reduced operator hardware cost for the critical path relative to the first hardware description.