18380222. SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Hajung Lee of Suwon-si (KR)

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18380222 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

Simplified Explanation

The semiconductor package described in the abstract includes a first semiconductor chip, multiple second semiconductor chips stacked on top of the first chip, front and rear connection pads, a chip connection terminal, and an insulating adhesive layer with two material layers of different viscosities.

  • The semiconductor package consists of a stack of semiconductor chips connected through front and rear connection pads.
  • An insulating adhesive layer with two material layers of different viscosities is used to secure the chips and connection terminal in place.

Potential Applications

The technology described in this semiconductor package could be applied in various electronic devices such as smartphones, tablets, laptops, and other consumer electronics.

Problems Solved

This semiconductor package helps in improving the efficiency and performance of electronic devices by providing a secure and reliable connection between multiple semiconductor chips.

Benefits

The benefits of this technology include enhanced reliability, improved thermal management, and increased functionality in electronic devices.

Potential Commercial Applications

The semiconductor package technology can be utilized in the manufacturing of advanced electronic devices for consumer, industrial, and automotive applications.

Possible Prior Art

One possible prior art for this technology could be the use of insulating adhesive layers in semiconductor packaging to secure multiple chips in a stacked configuration.

Unanswered Questions

How does the insulating adhesive layer impact the overall thermal performance of the semiconductor package?

The abstract does not provide specific details on how the insulating adhesive layer affects the thermal management of the semiconductor package. Further research or experimentation may be needed to understand this aspect.

What are the specific materials used in the first and second material layers of the insulating adhesive layer?

The abstract mentions the viscosities of the two material layers but does not specify the actual materials used. Additional information on the composition of these layers would be helpful in understanding the technology better.


Original Abstract Submitted

A semiconductor package is provided. The semiconductor package includes a first semiconductor chip, a plurality of second semiconductor chips sequentially stacked on the first semiconductor chip, a front connection pad disposed on a lower surface of the plurality of second semiconductor chips, a rear connection pad attached on an upper surface of the first semiconductor chip and the second semiconductor chips, a chip connection terminal disposed between the front connection pad and the rear connection pad, and an insulating adhesive layer disposed between the first semiconductor chip and a lowermost second semiconductor chip and between two adjacent second semiconductor chips, the insulating adhesive layer including a first material layer covering a sidewall of the chip connection terminal and having first viscosity and a second material layer disposed to surround the first material layer in a plan view and have second viscosity which is greater than the first viscosity.