View source for 18341815. METHODS OF TESTING NONVOLATILE MEMORY DEVICES AND NONVOLATILE MEMORY DEVICES simplified abstract (Samsung Electronics Co., Ltd.)

=METHODS OF TESTING NONVOLATILE MEMORY DEVICES AND NONVOLATILE MEMORY DEVICES=


==Organization Name==

[[:Category:Samsung Electronics Co., Ltd.|Samsung Electronics Co., Ltd.]]


[[Category:Samsung Electronics Co., Ltd.]]

==Inventor(s)==

[[:Category:Yeonwook Jung of Suwon-si (KR)|Yeonwook Jung of Suwon-si (KR)]][[Category:Yeonwook Jung of Suwon-si (KR)]]

[[:Category:Myeongwoo Lee of Suwon-si (KR)|Myeongwoo Lee of Suwon-si (KR)]][[Category:Myeongwoo Lee of Suwon-si (KR)]]

[[:Category:Jongchul Park of Suwon-si (KR)|Jongchul Park of Suwon-si (KR)]][[Category:Jongchul Park of Suwon-si (KR)]]

==METHODS OF TESTING NONVOLATILE MEMORY DEVICES AND NONVOLATILE MEMORY DEVICES - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18341815 titled 'METHODS OF TESTING NONVOLATILE MEMORY DEVICES AND NONVOLATILE MEMORY DEVICES

==Simplified Explanation==

The patent application describes a method of testing a nonvolatile memory device with circuit elements in different semiconductor layers, mimicking the on-state of memory cells, and determining the normal operation of the page buffer circuit based on sensing and latching operations.

* Circuit elements such as page buffer circuit and drivers are provided in a second semiconductor layer.
* Discharging paths are created between a sensing node and discharge transistors to mimic the on-state of memory cells.
* Sensing and latching operations are performed in the page buffer circuit to determine its normal operation.

== Potential Applications ==
This technology could be applied in the semiconductor industry for testing nonvolatile memory devices efficiently and accurately.

== Problems Solved ==
This innovation solves the problem of effectively testing nonvolatile memory devices with complex circuit elements in different semiconductor layers.

== Benefits ==
The benefits of this technology include improved testing accuracy, faster testing processes, and enhanced reliability of nonvolatile memory devices.

== Potential Commercial Applications ==
The potential commercial applications of this technology could be in the production and testing of nonvolatile memory devices for various electronic devices.

== Possible Prior Art ==
One possible prior art could be the use of similar testing methods for semiconductor devices with complex circuit elements in different layers.

=== Unanswered Questions ===

=== How does this technology compare to traditional testing methods for nonvolatile memory devices? ===
This article does not provide a direct comparison between this technology and traditional testing methods for nonvolatile memory devices. 

=== What are the specific parameters used in the sensing and latching operations in the page buffer circuit? ===
The article does not delve into the specific parameters used in the sensing and latching operations in the page buffer circuit.


==Original Abstract Submitted==

In a method of testing a nonvolatile memory device including a first semiconductor layer in which and a second semiconductor layer formed prior to the first semiconductor layer, circuit elements including a page buffer circuit and at least one driver spaced apart from the page buffer circuit are provided in the second semiconductor layer, an on-state of nonvolatile memory cells which are not connected to the page buffer circuit is mimicked by providing at least one discharging path between a sensing node and a plurality of discharge transistors of the at least one driver, a sensing and latching operation with the on-state being mimicked is performed in the page buffer circuit and whether the page buffer circuit operates normally is determined based on a result of the sensing and latching operation.



[[Category:G11C11/4093]]
[[Category:G11C11/4094]]