18338757. MEMORY DEVICE INCLUDING VERTICALLY STACKED PERIPHERAL REGIONS simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
MEMORY DEVICE INCLUDING VERTICALLY STACKED PERIPHERAL REGIONS
Organization Name
Inventor(s)
MEMORY DEVICE INCLUDING VERTICALLY STACKED PERIPHERAL REGIONS - A simplified explanation of the abstract
This abstract first appeared for US patent application 18338757 titled 'MEMORY DEVICE INCLUDING VERTICALLY STACKED PERIPHERAL REGIONS
Simplified Explanation
The patent application describes a memory device with a three-dimensional structure, including a cell region and a peripheral circuit region that overlaps the cell region.
- Memory device with a three-dimensional structure
- Cell region and peripheral circuit region
- Peripheral circuit region includes stacked sub-peripheral circuit regions
- First sub-peripheral circuit region with substrate and circuit element
- Second sub-peripheral circuit region with sub-poly structure and circuit element
---
- Potential Applications
- High-density memory devices
- Improved performance in memory storage
- Problems Solved
- Increasing memory storage capacity
- Enhancing memory device performance
- Benefits
- Higher memory density
- Better memory device performance
- More efficient memory storage solutions
Original Abstract Submitted
A semiconductor device, and more particularly, to a memory device having a three-dimensional structure are provided. The memory device various example embodiments includes a cell region and a peripheral circuit region that at least partially overlaps the cell region when viewed in plan view. The peripheral circuit region includes a first sub-peripheral circuit region including a substrate and a circuit element on the substrate, and a second sub-peripheral circuit region that is stacked on the first sub-peripheral circuit region in a vertical direction and that includes a sub-poly structure and a circuit element on the sub-poly structure.
