18242034. MEMORY DEVICE SUPPORTING A HIGH-EFFICIENT INPUT/OUTPUT INTERFACE AND A MEMORY SYSTEM INCLUDING THE MEMORY DEVICE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
- 1 MEMORY DEVICE SUPPORTING A HIGH-EFFICIENT INPUT/OUTPUT INTERFACE AND A MEMORY SYSTEM INCLUDING THE MEMORY DEVICE
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 MEMORY DEVICE SUPPORTING A HIGH-EFFICIENT INPUT/OUTPUT INTERFACE AND A MEMORY SYSTEM INCLUDING THE MEMORY DEVICE - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Original Abstract Submitted
MEMORY DEVICE SUPPORTING A HIGH-EFFICIENT INPUT/OUTPUT INTERFACE AND A MEMORY SYSTEM INCLUDING THE MEMORY DEVICE
Organization Name
Inventor(s)
Younghoon Son of Yongin-si (KR)
Junghwan Choi of Hwaseong-si (KR)
MEMORY DEVICE SUPPORTING A HIGH-EFFICIENT INPUT/OUTPUT INTERFACE AND A MEMORY SYSTEM INCLUDING THE MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18242034 titled 'MEMORY DEVICE SUPPORTING A HIGH-EFFICIENT INPUT/OUTPUT INTERFACE AND A MEMORY SYSTEM INCLUDING THE MEMORY DEVICE
Simplified Explanation
The abstract describes a memory system that uses different voltage levels to transmit commands, addresses, and data during different time intervals. The memory device samples the data input/output signal in a pulse amplitude modulation (PAM)-N mode during the first time interval and in a non return to zero (NRZ) mode during the second time interval.
- The memory system uses different voltage levels to transmit commands, addresses, and data.
- During the first time interval, the data input/output signal is transmitted in a pulse amplitude modulation (PAM)-N mode.
- During the second time interval, the data input/output signal is transmitted in a non return to zero (NRZ) mode.
- The memory controller is responsible for transmitting the command, address, or data to the first channel based on the voltage levels of the data input/output signal.
- The memory device samples the data input/output signal received via the first channel during the first and second time intervals.
Potential Applications
- This memory system can be used in various electronic devices that require efficient data transmission and storage, such as computers, smartphones, and servers.
- It can be particularly useful in high-speed data processing applications where quick and reliable memory access is crucial.
Problems Solved
- The memory system solves the problem of efficient data transmission by using different voltage levels and time intervals.
- It addresses the need for reliable memory access by sampling the data input/output signal in different modes.
Benefits
- The use of different voltage levels and time intervals allows for more efficient data transmission and storage.
- The memory system provides reliable memory access by sampling the data input/output signal in different modes.
- It can potentially improve the overall performance and speed of electronic devices that rely on memory systems.
Original Abstract Submitted
A memory system including: a memory controller to transmit a command, an address, or data to a first channel based on a data input/output signal having one of N (N is a natural number of three or more) different voltage levels during a first time interval, the memory controller transmitting the command, the address, or the data not transmitted during the first time interval to the first channel based on the data input/output signal having one of two different voltage levels during a second time interval; and a memory device to sample the data input/output signal received via the first channel during the first time interval in a pulse amplitude modulation (PAM)-N mode, the memory device sampling the data input/output signal received via the first channel during the second time interval in a non return to zero (NRZ) mode.
