18233100. IMAGE SENSOR simplified abstract (Samsung Electronics Co., Ltd.)

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IMAGE SENSOR

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

JUNGWOOK Lim of SUWON-SI (KR)

IMAGE SENSOR - A simplified explanation of the abstract

This abstract first appeared for US patent application 18233100 titled 'IMAGE SENSOR

Simplified Explanation

The abstract describes an image sensor comprising three chips: one with pixels and wiring structures, one with wiring structures and a substrate, and one with logic devices and wiring structures. Each pixel has multiple photodiodes and floating diffusion nodes connected by switching transistors.

  • Image sensor with three chips: one for pixels, one for wiring structures and substrate, and one for logic devices
  • Pixels have multiple photodiodes and floating diffusion nodes connected by switching transistors
  • Complex wiring structures connect the components within each pixel

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      1. Potential Applications
  • Digital cameras
  • Smartphones
  • Surveillance cameras
  • Medical imaging devices
      1. Problems Solved
  • Improved image quality
  • Higher resolution
  • Enhanced low-light performance
      1. Benefits
  • Higher quality images
  • Improved performance in low-light conditions
  • Increased resolution and detail capture


Original Abstract Submitted

An image sensor includes a first chip including a first substrate having a plurality of pixels, and a first wiring structure, each of the plurality of pixels including first and second isolated photodiodes; a second chip including a second wiring structure, and a second substrate; and a third chip including a third wiring structure, and a third substrate having logic devices, wherein each of the plurality of pixels includes a first floating diffusion node on the first photodiode, a second floating diffusion node on the second photodiode, a third floating diffusion node between the first and second floating diffusion nodes on the second photodiode, and a first switching transistor on the second substrate, and wherein the first switching transistor is connected to the first floating diffusion node through the first and second wiring structures, and the third floating diffusion node through the first and second wiring structures.