NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD

Organization Name

Inventor(s)

Daisaburo Takashima of Yokohama Kanagawa (JP)

NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD - A simplified explanation of the abstract

This abstract first appeared for US patent application 18179895 titled 'NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD

Simplified Explanation

The patent application describes a cell block structure for memory cells, including select transistors, local source lines, local bit lines, cell transistors, and resistance change elements. Here is a simplified explanation of the innovation:

Memory cells are connected in parallel between a local source line and a local bit line.
Select transistors are connected between the local bit line and a bit line.
Each memory cell includes a cell transistor with a gate connected to a word line, and a resistance change element connected in series between the local source line and the local bit line.
The cell block is configured as a columnar structure with conductive films functioning as word lines.
The select transistor and the local bit line are connected at a contact portion formed of a material different from the local bit line.

Potential Applications

The technology described in the patent application could be applied in:

Non-volatile memory devices
Solid-state drives
Embedded memory in integrated circuits

Problems Solved

This technology addresses issues such as:

Improving memory cell performance
Enhancing data storage capacity
Increasing data transfer speeds

Benefits

The benefits of this technology include:

Higher memory density
Faster data access
Improved reliability and durability of memory cells

Potential Commercial Applications

The potential commercial applications of this technology could include:

Consumer electronics
Data storage solutions
Semiconductor manufacturing industry

Possible Prior Art

One possible prior art for this technology could be the development of resistive random-access memory (RRAM) structures in the field of non-volatile memory devices.

Unanswered Questions

How does this technology compare to existing memory cell structures in terms of performance and efficiency?

This article does not provide a direct comparison with existing memory cell structures to evaluate performance and efficiency.

What are the specific materials used in the contact portion that differentiate it from the local bit line?

The article does not specify the exact materials used in the contact portion that are different from the local bit line.

Original Abstract Submitted

According to one embodiment, a cell block includes memory cells and select transistors. The memory cells correspond are connected in parallel between a local source line and a local bit line. The select transistor is connected between the local bit line and a bit line. The memory cell includes a cell transistor and a resistance change element. A gate of the cell transistor is connected to a word line. The resistance change element is connected to the cell transistor in series between the local source line and the local bit line. Each cell block is configured as a columnar structure penetrating a plurality of conductive films functioning as word lines. The select transistor and the local bit line are connected at a contact portion formed of a material different from a material of the local bit line.

18179895. NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD simplified abstract (Kioxia Corporation)

Contents

NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD

Organization Name

Inventor(s)