18166244. SYSTEM, DEVICE AND METHOD FOR ACCESSING DEVICE-ATTACHED MEMORY simplified abstract (Samsung Electronics Co., Ltd.)
SYSTEM, DEVICE AND METHOD FOR ACCESSING DEVICE-ATTACHED MEMORY
Organization Name
Inventor(s)
Jeongho Lee of Gwacheon-si (KR)
Jaeho Shin of Gwangmyeong-si (KR)
Wonseb Jeong of Hwaseong-si (KR)
Ipoom Jeong of Hwaseong-si (KR)
Hyeokjun Choe of Hwaseong-si (KR)
SYSTEM, DEVICE AND METHOD FOR ACCESSING DEVICE-ATTACHED MEMORY - A simplified explanation of the abstract
This abstract first appeared for US patent application 18166244 titled 'SYSTEM, DEVICE AND METHOD FOR ACCESSING DEVICE-ATTACHED MEMORY
Simplified Explanation
The abstract describes a device that is connected to a host processor via a bus. The device includes an accelerator circuit and a controller. The accelerator circuit operates based on a message received from the host processor. The controller controls access to a memory connected to the device. When the accelerator circuit sends a read request, the controller sends a message to the host processor requesting resolution of coherence and prefetches data from the memory.
- The device is connected to a host processor via a bus.
- It includes an accelerator circuit and a controller.
- The accelerator circuit operates based on a message from the host processor.
- The controller controls access to a connected memory.
- When a read request is received from the accelerator circuit, the controller sends a message to the host processor requesting coherence resolution.
- The controller also prefetches data from the memory.
Potential Applications
- This technology can be used in devices that require high-speed data processing, such as graphics processing units (GPUs) or artificial intelligence accelerators.
- It can be applied in systems that require efficient memory access and data transfer, such as data centers or supercomputers.
Problems Solved
- The technology solves the problem of efficiently accessing and transferring data between a host processor and an accelerator circuit.
- It addresses the issue of coherence between the host processor and the accelerator circuit, ensuring that the most up-to-date data is used.
Benefits
- The device allows for faster data processing by offloading tasks to the accelerator circuit.
- It improves overall system performance by efficiently managing memory access and data transfer.
- The technology ensures coherence between the host processor and the accelerator circuit, preventing data inconsistencies.
Original Abstract Submitted
A device connected to a host processor via a bus includes: an accelerator circuit configured to operate based on a message received from the host processor; and a controller configured to control an access to a memory connected to the device, wherein the controller is further configured to, in response to a read request received from the accelerator circuit, provide a first message requesting resolution of coherence to the host processor and prefetch first data from the memory.
- Samsung Electronics Co., Ltd.
- Jeongho Lee of Gwacheon-si (KR)
- Heehyun Nam of Seoul (KR)
- Jaeho Shin of Gwangmyeong-si (KR)
- Hyodeok Shin of Seoul (KR)
- Younggeon Yoo of Seoul (KR)
- Younho Jeon of Gimhae-si (KR)
- Wonseb Jeong of Hwaseong-si (KR)
- Ipoom Jeong of Hwaseong-si (KR)
- Hyeokjun Choe of Hwaseong-si (KR)
- G06F12/0817
- G06F3/06
- G06F12/0862