18162679. PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
Contents
- 1 PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Chih-Wei Wu of Yilan County (TW)
Wen-Chih Chiou of Miaoli County (TW)
Ying-Ching Shih of Hsinchu City (TW)
PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18162679 titled 'PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
Simplified Explanation
The package structure described in the abstract includes a first under bump metallurgy (UBM) structure with a barrier layer embedded in a dielectric layer, an upper metal layer offset from the barrier layer, and a solder layer on top of the UBM structure.
- The package structure consists of a first under bump metallurgy (UBM) structure with specific layers and configurations.
- The barrier layer is embedded in the dielectric layer, with the upper metal layer positioned laterally offset from the barrier layer.
- A portion of the top surface of the barrier layer is exposed by the dielectric layer.
- The solder layer is placed on top of the UBM structure and makes contact with the upper metal layer.
Potential Applications
This technology could be applied in semiconductor packaging, specifically in the manufacturing of electronic devices where reliable connections are crucial.
Problems Solved
This innovation helps in improving the reliability and performance of electronic devices by providing a robust package structure with enhanced connectivity.
Benefits
The package structure offers improved electrical connections, better thermal management, and overall enhanced performance of electronic devices.
Potential Commercial Applications
This technology could be utilized in the production of various electronic devices such as smartphones, tablets, laptops, and other consumer electronics.
Possible Prior Art
Prior art in the field of semiconductor packaging may include similar structures or methods used in the manufacturing of electronic devices.
Unanswered Questions
How does this package structure compare to traditional UBM structures in terms of performance and reliability?
The article does not provide a direct comparison between this package structure and traditional UBM structures. Further research or testing may be needed to evaluate the performance and reliability differences.
What are the potential challenges in implementing this package structure on a large scale in semiconductor manufacturing?
The article does not address the potential challenges in large-scale implementation of this package structure. Factors such as cost, scalability, and compatibility with existing manufacturing processes could be significant considerations.
Original Abstract Submitted
Provided are a package structure having a joint structure and a method of forming the same. The package structure includes: a first under bump metallurgy (UBM) structure disposed on a first dielectric layer, wherein the first UBM structure at least comprises: a barrier layer embedded in the first dielectric layer; and an upper metal layer disposed over the barrier layer, wherein a sidewall of the barrier layer is laterally offset outward from a sidewall of the upper metal layer, and a portion of a top surface of the barrier layer is exposed by the first dielectric layer; and a solder layer disposed on the first UBM structure and contacting the upper metal layer.
