18112323. METHOD OF FABRICATING SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
METHOD OF FABRICATING SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Jeong Hyun Lee of Suwon-si (KR)
Choon Bin Yim of Suwon-si (KR)
METHOD OF FABRICATING SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18112323 titled 'METHOD OF FABRICATING SEMICONDUCTOR PACKAGE
Simplified Explanation
The patent application describes a method of fabricating a semiconductor package. Here is a simplified explanation of the abstract:
- A semiconductor chip is provided with solder balls on its bottom surface.
- An adhesive layer is formed on the top surface of the semiconductor chip.
- The semiconductor chip is mounted on a first wafer using the solder balls.
- A second wafer is bonded to the first wafer and the adhesive layer of the semiconductor chip.
- A molding layer is formed between the first wafer and the second wafer.
- The first wafer, molding layer, and second wafer are cut.
Potential applications of this technology:
- Semiconductor packaging industry
- Electronics manufacturing
Problems solved by this technology:
- Provides a method for fabricating a semiconductor package with improved structural integrity.
- Enables efficient bonding of wafers and semiconductor chips.
Benefits of this technology:
- Enhanced reliability and durability of semiconductor packages.
- Simplified fabrication process.
- Cost-effective manufacturing.
Original Abstract Submitted
A method of fabricating a semiconductor package includes providing a semiconductor chip having solder balls formed on a bottom surface thereof, forming an adhesive layer on a top surface of the semiconductor chip, mounting the semiconductor chip on a first wafer using the solder balls, bonding a second wafer to the first wafer and to the adhesive layer of the semiconductor chip that is mounted on the first wafer, forming a molding layer between the first wafer and the second wafer, and cutting the first wafer, the molding layer and the second wafer.
