18091258. MEMORY AND METHOD WITH IN-MEMORY COMPUTING DEFECT DETECTION simplified abstract (Samsung Electronics Co., Ltd.)

MEMORY AND METHOD WITH IN-MEMORY COMPUTING DEFECT DETECTION

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Sungmeen Myung of Suwon-si (KR)

Seok Ju Yun of Suwon-si (KR)

Jaehyuk Lee of Suwon-si (KR)

Seungchul Jung of Suwon-si (KR)

MEMORY AND METHOD WITH IN-MEMORY COMPUTING DEFECT DETECTION - A simplified explanation of the abstract

This abstract first appeared for US patent application 18091258 titled 'MEMORY AND METHOD WITH IN-MEMORY COMPUTING DEFECT DETECTION

Simplified Explanation

The abstract describes a method and memory device with in-memory computing defect detection. The memory device includes banks with bit-cells and an in-memory computation (IMC) operator for performing operations between data in the memory and input data. The device is able to generate test patterns to detect defects in the memory or operator and perform repairs accordingly.

• Memory device with in-memory computing defect detection
• Memory includes banks with bit-cells
• In-memory computation (IMC) operator performs operations between data in memory and input data
• Test patterns generated to detect defects in memory or operator
• Repairs performed based on defect detection

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1. 1. 1. Potential Applications

• Memory devices in high-performance computing systems
• Data centers requiring reliable memory operations
• Embedded systems with in-memory computing capabilities

1. 1. 1. Problems Solved

• Detecting defects in memory or operator in real-time
• Ensuring data integrity and reliability in memory operations
• Improving fault tolerance in memory devices

1. 1. 1. Benefits

• Early detection and repair of defects in memory devices
• Enhanced reliability and data integrity in memory operations
• Increased fault tolerance and system stability

Original Abstract Submitted

A method and memory device with in-memory computing defection detection is disclosed. A memory device includes a memory including banks, wherein each bank includes a respective plurality of bit-cells, an in-memory computation (IMC) operator configured to perform an IMC operation between first data while the first data is in the bit-cells of the memory and second data received as input to the memory device, wherein the banks share the operator, and wherein the memory device is configured to: generate a first test pattern that is stored in the memory and generate a second test pattern applied to the IMC operator, and based thereon determine whether a defect has occurred in either the memory or the operator, and perform a repair based on the determination that a defect has occurred.