18076529. SEMICONDUCTOR DEVICE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR DEVICE
Organization Name
Inventor(s)
SUJEONG Park of Hwaseong-si (KR)
KWANGJIN Moon of Hwaseong-si (KR)
MYUNGJOO Park of Pohang-si (KR)
SEMICONDUCTOR DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18076529 titled 'SEMICONDUCTOR DEVICE
Simplified Explanation
The patent application describes a semiconductor device that includes a semiconductor substrate, an under-bump pattern, a bump pattern, and an organic dielectric layer. The under-bump pattern is made of a first metal and is located on the semiconductor substrate. The bump pattern is on top of the under-bump pattern and has a support pattern and a solder pillar pattern. The support pattern is wider than the solder pillar pattern and is in contact with the under-bump pattern. The organic dielectric layer is in contact with the sidewall of the bump pattern.
- The semiconductor device includes a semiconductor substrate, under-bump pattern, bump pattern, and organic dielectric layer.
- The under-bump pattern is made of a first metal and is located on the semiconductor substrate.
- The bump pattern includes a support pattern and a solder pillar pattern.
- The support pattern is wider than the solder pillar pattern and is in contact with the under-bump pattern.
- The organic dielectric layer is in contact with the sidewall of the bump pattern.
Potential applications of this technology:
- Semiconductor manufacturing industry
- Electronics industry
- Integrated circuit manufacturing
Problems solved by this technology:
- Provides a structure for a semiconductor device that improves reliability and performance.
- Addresses issues related to intermetallic compound formation and solder joint reliability.
Benefits of this technology:
- Improved reliability and performance of semiconductor devices.
- Enhanced solder joint reliability.
- Simplified manufacturing process.
Original Abstract Submitted
Disclosed is a semiconductor device comprising a semiconductor substrate, an under-bump pattern on the semiconductor substrate and including a first metal, a bump pattern on the under-bump pattern, and an organic dielectric layer on the semiconductor substrate and in contact with a sidewall of the bump pattern. The bump pattern includes a support pattern in contact with the under-bump pattern and having a first width, and a solder pillar pattern on the support pattern and having a second width. The first width is greater than the second width. The support pattern includes at least one of a solder material and an intermetallic compound (IMC). The intermetallic compound includes the first metal and the solder material.
