18047033. PACKAGE SUBSTRATE WITH DUAL DAMASCENE BASED SELF-ALIGNED VIAS simplified abstract (Intel Corporation)

PACKAGE SUBSTRATE WITH DUAL DAMASCENE BASED SELF-ALIGNED VIAS

Organization Name

Intel Corporation

Inventor(s)

Jeremy Ecton of Gilbert AZ (US)

Brandon C. Marin of Gilbert AZ (US)

Srinivas V. Pietambaram of Chandler AZ (US)

Hiroki Tanaka of Gilbert AZ (US)

Haobo Chen of Chandler AZ (US)

PACKAGE SUBSTRATE WITH DUAL DAMASCENE BASED SELF-ALIGNED VIAS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18047033 titled 'PACKAGE SUBSTRATE WITH DUAL DAMASCENE BASED SELF-ALIGNED VIAS

Simplified Explanation

The patent application describes a microelectronic assembly with a package substrate made of organic dielectric material and conductive traces, along with integrated circuit dies connected to the substrate. The substrate has alternating layers of dielectric material and conductive vias, with non-coplanar layers and orthogonal sidewalls on the vias.

• The microelectronic assembly includes a package substrate with multiple layers of organic dielectric material and conductive traces, as well as integrated circuit dies connected to one side of the substrate.
• The substrate has alternating layers of dielectric material and conductive vias, with non-coplanar layers and orthogonal sidewalls on the vias.
• The sidewalls of the conductive vias protrude from the edges of the conductive traces by a small amount, providing a unique configuration for the assembly.

Potential Applications

This technology could be applied in various microelectronic devices such as smartphones, tablets, and other portable electronic devices.

Problems Solved

This technology solves the problem of signal interference and crosstalk in microelectronic assemblies by optimizing the layout of conductive traces and vias.

Benefits

The benefits of this technology include improved signal integrity, reduced electromagnetic interference, and enhanced overall performance of microelectronic devices.

Potential Commercial Applications

This technology could be utilized in the manufacturing of high-performance electronic devices for consumer electronics, automotive applications, and industrial equipment.

Possible Prior Art

One possible prior art could be the use of multilayer organic substrates in microelectronic assemblies, but the specific configuration of non-coplanar layers and orthogonal vias may be a novel aspect of this technology.

Unanswered Questions

How does this technology impact the overall cost of manufacturing microelectronic assemblies?

The article does not provide information on the cost implications of implementing this technology in production processes.

What are the potential challenges in scaling up this technology for mass production?

The article does not address the scalability and mass production challenges that may arise when implementing this technology on a larger scale.

Original Abstract Submitted

Embodiments of a microelectronic assembly that includes: a package substrate comprising a plurality of layers of organic dielectric material and conductive traces alternating with conductive vias in alternate layers of the organic dielectric material; and a plurality of integrated circuit dies coupled to a first side of the package substrate by interconnects, in which: the plurality of layers of the organic dielectric material comprises at least a first layer having a conductive via and a second layer having a conductive trace in contact with the conductive via, the second layer is not coplanar with the first layer, sidewalls of the conductive via are orthogonal to the conductive trace, and two opposing sidewalls of the conductive via separated by a width of the conductive via protrude from respectively proximate edges of the conductive trace by a protrusion that is at least ten times less than the width of the conductive via.