17933121. METHOD OF FORMING SEMICONDUCTOR STRUCTURE simplified abstract (NANYA TECHNOLOGY CORPORATION)

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METHOD OF FORMING SEMICONDUCTOR STRUCTURE

Organization Name

NANYA TECHNOLOGY CORPORATION

Inventor(s)

Ya-Chin Lin of Chiayi County (TW)

METHOD OF FORMING SEMICONDUCTOR STRUCTURE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17933121 titled 'METHOD OF FORMING SEMICONDUCTOR STRUCTURE

Simplified Explanation

The method described in the patent application involves forming a semiconductor structure by creating a complex dielectric stack over a substrate, which includes multiple support and sacrificial layers. This stack is then covered by hard mask layers, which are etched to create openings exposing the substrate. A bottom electrode layer is then formed in these openings.

  • Formation of a dielectric stack with multiple support and sacrificial layers.
  • Deposition of first and second hard mask layers over the dielectric stack.
  • Etching of the hard mask layers to create openings in the dielectric stack.
  • Formation of a bottom electrode layer in the openings.

Potential Applications

The technology described in this patent application could be applied in the manufacturing of advanced semiconductor devices, such as memory chips, processors, and sensors.

Problems Solved

This method solves the problem of creating precise and well-defined openings in a dielectric stack to expose the substrate for further processing steps in semiconductor fabrication.

Benefits

The benefits of this technology include improved control over the formation of semiconductor structures, leading to enhanced device performance and reliability.

Potential Commercial Applications

Potential commercial applications of this technology include the production of high-performance electronic devices for various industries, including consumer electronics, telecommunications, and automotive.

Possible Prior Art

One possible prior art for this technology could be the use of similar dielectric stack formation methods in semiconductor manufacturing processes to create intricate device structures.

What are the specific materials used in the formation of the dielectric stack and hard mask layers?

The specific materials used in the formation of the dielectric stack and hard mask layers are not mentioned in the abstract. It would be helpful to know the exact materials to understand the compatibility and performance of the semiconductor structure.

How does the etching process of the hard mask layers differ in terms of speed and precision?

The abstract mentions that the first hard mask layer is etched faster than the second hard mask layer. Understanding the reasons behind this speed difference and how it affects the overall precision of the process would provide valuable insights into the technology's efficiency.


Original Abstract Submitted

A method of forming a semiconductor structure includes forming a dielectric stack over a substrate, in which forming the dielectric stack includes forming a first support layer, a first sacrificial layer, a second support layer, a second sacrificial layer and a third support layer in sequence. A first hard mask layer is formed over the dielectric stack. A second hard mask layer is formed over the first hard mask layer. A patterned mask is formed over the second hard mask layer. The first and second hard mask layers are etched using the patterned mask as an etch mask to form first and second hard masks, in which the first hard mask layer is etched faster than the second hard mask layer. An opening is formed in the dielectric stack to expose the substrate. A bottom electrode layer is formed in the opening of the dielectric stack.