17932887. SEMICONDUCTOR DEVICE HAVING EDGE SEAL AND METHOD OF MAKING THEREOF WITHOUT METAL HARD MASK ARCING simplified abstract (SanDisk Technologies LLC)

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SEMICONDUCTOR DEVICE HAVING EDGE SEAL AND METHOD OF MAKING THEREOF WITHOUT METAL HARD MASK ARCING

Organization Name

SanDisk Technologies LLC

Inventor(s)

Kazuto Watanabe of Yokkaichi (JP)

SEMICONDUCTOR DEVICE HAVING EDGE SEAL AND METHOD OF MAKING THEREOF WITHOUT METAL HARD MASK ARCING - A simplified explanation of the abstract

This abstract first appeared for US patent application 17932887 titled 'SEMICONDUCTOR DEVICE HAVING EDGE SEAL AND METHOD OF MAKING THEREOF WITHOUT METAL HARD MASK ARCING

Simplified Explanation

The abstract describes a method for patterning a conductive hard mask layer with peripheral discrete openings, forming peripheral discrete via cavities, expanding them into a continuous moat trench, and creating an edge seal structure within the trench. Alternatively, a conductive bridge structure can be formed before patterning the hard mask layer, with a moat trench formed around the periphery of the semiconductor die while the bridge structure provides electrical connection between inner and outer portions of the hard mask layer. The entire hard mask layer can be electrically connected to a semiconductor substrate to prevent arcing during the etching process.

  • Conductive hard mask layer patterned with peripheral discrete openings
  • Formation of peripheral discrete via cavities
  • Expansion of cavities into a continuous moat trench
  • Creation of an edge seal structure within the trench
  • Formation of a conductive bridge structure for electrical connection
  • Electrically connecting the hard mask layer to the semiconductor substrate

Potential Applications

This technology can be applied in semiconductor manufacturing processes, specifically in the fabrication of integrated circuits where precise patterning and electrical connections are crucial.

Problems Solved

This innovation solves the issue of arcing during the etching process by ensuring the entire conductive hard mask layer is electrically connected to the semiconductor substrate.

Benefits

The benefits of this technology include improved reliability and precision in semiconductor manufacturing, leading to higher quality integrated circuits with reduced risk of defects.

Potential Commercial Applications

The potential commercial applications of this technology include the semiconductor industry, particularly in the production of advanced electronic devices such as microprocessors and memory chips.

Possible Prior Art

One possible prior art could be the use of edge seal structures in semiconductor manufacturing processes to prevent arcing during etching. Another could be the formation of conductive bridge structures for electrical connections within semiconductor devices.

Unanswered Questions

How does this technology compare to existing methods for preventing arcing during etching processes in semiconductor manufacturing?

This technology offers a comprehensive solution by electrically connecting the entire hard mask layer to the semiconductor substrate, which may be more effective in preventing arcing compared to other methods that focus on localized solutions.

What are the potential scalability challenges of implementing this technology in mass production of semiconductor devices?

The scalability of this technology may depend on factors such as the complexity of the design, the size of the semiconductor die, and the compatibility with existing manufacturing processes. Further research and development may be needed to optimize the scalability of this innovation for mass production.


Original Abstract Submitted

A conductive hard mask layer can be patterned with peripheral discrete openings. An anisotropic etch process can be performed to form peripheral discrete via cavities, which are subsequently expanded to form a continuous moat trench. An edge seal structure can be formed in the continuous moat trench. Alternatively, a conductive bridge structure may be formed prior to formation of a patterned conductive hard mask layer, and a moat trench can be formed around a periphery of the semiconductor die while the conductive bridge structure provides electrical connection between an inner portion and an outer portion of the conductive hard mask layer. The entire conductive hard mask layer can be electrically connected to a semiconductor substrate to reduce or prevent arcing during an anisotropic etch process that forms the peripheral discrete via cavities or the moat trench.