17932808. FLEXIBLE ONE-HOT DECODING LOGIC FOR CLOCK CONTROLS simplified abstract (NVIDIA Corporation)
Contents
- 1 FLEXIBLE ONE-HOT DECODING LOGIC FOR CLOCK CONTROLS
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 FLEXIBLE ONE-HOT DECODING LOGIC FOR CLOCK CONTROLS - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
FLEXIBLE ONE-HOT DECODING LOGIC FOR CLOCK CONTROLS
Organization Name
Inventor(s)
Mahmut Yilmaz of Los Altos Hills CA (US)
Vinod Pagalone of San Jose CA (US)
Munish Aggarwal of Santa Clara CA (US)
Doochul Shin of Sunnyvale CA (US)
FLEXIBLE ONE-HOT DECODING LOGIC FOR CLOCK CONTROLS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17932808 titled 'FLEXIBLE ONE-HOT DECODING LOGIC FOR CLOCK CONTROLS
Simplified Explanation
The circuit described in the abstract is designed to improve control over asynchronous signal crossings during circuit scan tests. It includes multiple scan registers and a decoder that translates the output of the scan registers into one-hot controls for local clock gates in different clock domains. Programmable registers allow for selective enabling and disabling of the local clock gates in the various clock domains.
- Multiple scan registers are used in the circuit.
- A decoder translates the combined output of the scan registers into one-hot controls.
- Local clock gates in different clock domains are controlled by the translated signals.
- Programmable registers enable or disable the local clock gates in the different clock domains.
Potential Applications
This technology could be applied in the design and testing of integrated circuits, particularly in scenarios where asynchronous signal crossings need to be managed effectively.
Problems Solved
This circuit helps improve control over asynchronous signal crossings during circuit scan tests, ensuring more accurate and reliable testing results.
Benefits
The circuit enhances the efficiency and accuracy of circuit scan tests by providing better control over asynchronous signal crossings in different clock domains.
Potential Commercial Applications
This technology could be valuable for semiconductor companies, electronics manufacturers, and other industries involved in integrated circuit design and testing.
Possible Prior Art
Prior art in this field may include patents or research papers related to circuit testing, asynchronous signal crossings, and clock domain crossing techniques.
=== What are the specific features of this circuit that make it effective in managing asynchronous signal crossings during circuit scan tests? The circuit's use of multiple scan registers, a decoder, and programmable registers allows for precise control over local clock gates in different clock domains, ensuring accurate management of asynchronous signal crossings.
=== How does this circuit compare to existing solutions for controlling asynchronous signal crossings during circuit scan tests? This circuit offers a more sophisticated and flexible approach to managing asynchronous signal crossings compared to traditional methods. By translating the output of scan registers into one-hot controls and enabling selective control over local clock gates, it provides a more efficient and reliable solution for circuit scan tests.
Original Abstract Submitted
A circuit for improving control over asynchronous signal crossings during circuit scan tests includes multiple scan registers and a decoder configured to translate a combined output of the scan registers into multiple one-hot controls to the local clock gates of scan registers disposed in multiple different clock domains. Programmable registers are provided to selectively enable and disable the local clock gates of the different clock domains.
