17903159. INTEGRATED CIRCUIT DEVICES simplified abstract (Samsung Electronics Co., Ltd.)
Contents
INTEGRATED CIRCUIT DEVICES
Organization Name
Inventor(s)
Kijoon Kim of Hwaseong-si (KR)
INTEGRATED CIRCUIT DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 17903159 titled 'INTEGRATED CIRCUIT DEVICES
Simplified Explanation
The abstract describes an integrated circuit device that includes a substrate with a word line trench and a first recess adjacent to a side wall of the trench. The device also includes a channel region on the inner wall of the trench, extending parallel to the substrate's surface. The channel region consists of a first channel region in the substrate and a second channel region made of a two-dimensional material of a specific conductivity type. Additionally, the device includes a gate insulating layer, a word line, and a source region.
- The integrated circuit device includes a word line trench and a first recess adjacent to a side wall of the trench.
- The channel region is formed on the inner wall of the trench and extends parallel to the substrate's surface.
- The channel region consists of a first channel region in the substrate and a second channel region made of a two-dimensional material.
- The device includes a gate insulating layer, a word line, and a source region.
Potential applications of this technology:
- Integrated circuits and microprocessors
- Memory devices
- Communication devices
- Consumer electronics
Problems solved by this technology:
- Enhanced performance and efficiency of integrated circuits
- Improved conductivity and channel control
- Reduction in power consumption
Benefits of this technology:
- Higher processing speeds
- Lower power consumption
- Improved device performance and functionality
- Enhanced integration and miniaturization capabilities
Original Abstract Submitted
An integrated circuit device including a substrate including a word line trench and a first recess adjacent to a first side wall portion of an inner wall of the word line trench, a channel region on the inner wall and extending in a first direction parallel to an upper surface of the substrate, the channel region including a first channel region in a portion of the substrate adjacent to the inner wall and a second channel region on the inner wall and including a two-dimensional (2D) material of a first conductivity type, a gate insulating layer on the second channel region, a word line on the gate insulating layer and inside the word line trench, and a source region in a first recess and including the 2D material of the first conductivity type may be provided.
