17851245. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR PACKAGE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

JU-IL Choi of Seongnam-si (KR)

UN-BYOUNG Kang of Hwaseong-si (KR)

MINSEUNG Yoon of Yongin-si (KR)

YONGHOE Cho of Cheonan-si (KR)

JEONGGI Jin of Seoul (KR)

YUN SEOK Choi of Hwaseong-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17851245 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation

The patent application describes a semiconductor package that includes multiple components and layers to improve its performance and reliability.

  • The package consists of a first redistribution substrate, a first semiconductor chip, and first bumps connecting them.
  • There is a conductive structure on the first redistribution substrate, which is spaced apart from the first semiconductor chip.
  • A second redistribution substrate is placed on the first semiconductor chip, with second bumps connecting them.
  • A second semiconductor chip is mounted on the second redistribution substrate.
  • The package also includes two mold layers, with the first mold layer between the first redistribution substrate and the second redistribution substrate, and on the first semiconductor chip. The second mold layer is on the second redistribution substrate and the second semiconductor chip, and it is spaced apart from the first mold layer.

Potential applications of this technology:

  • Semiconductor packaging for electronic devices such as smartphones, tablets, and computers.
  • Integrated circuits and microprocessors used in various industries, including automotive, aerospace, and telecommunications.

Problems solved by this technology:

  • Improved performance and reliability of the semiconductor package.
  • Enhanced electrical connectivity and signal transmission between the components.
  • Protection of the components from external factors such as moisture, dust, and physical damage.

Benefits of this technology:

  • Higher efficiency and functionality of electronic devices.
  • Increased durability and lifespan of the semiconductor package.
  • Reduction in the size and weight of the package, allowing for more compact and portable devices.


Original Abstract Submitted

Provided is a semiconductor package, including a first redistribution substrate, a first semiconductor chip on the first redistribution substrate, first bumps between the first redistribution substrate and the first semiconductor chip, a conductive structure on the first redistribution substrate and spaced apart from the first semiconductor chip, a second redistribution substrate on the first semiconductor chip, second bumps between the first semiconductor chip and the second redistribution substrate, a second semiconductor chip on the second redistribution substrate, a first mold layer between the first redistribution substrate and the second redistribution substrate, and on the first semiconductor chip, and a second mold layer on the second redistribution substrate and the second semiconductor chip, and spaced apart from the first mold layer.