17692369. SEMICONDUCTOR DEVICE simplified abstract (Samsung Electronics Co., Ltd.)

SEMICONDUCTOR DEVICE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Ki Hwan Kim of Seoul (KR)

Jeong Ho Yoo of Seongnam-si (KR)

Cho Eun Lee of Pocheon-si (KR)

Yong Uk Jeon of Hwaseong-si (KR)

Young Dae Cho of Hwaseong-si (KR)

SEMICONDUCTOR DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17692369 titled 'SEMICONDUCTOR DEVICE

Simplified Explanation

The abstract describes a semiconductor device that includes an active pattern, source/drain pattern, and gate structures. The source/drain pattern has a first epitaxial region with antimony or bismuth and a second epitaxial region with phosphorus.

• The semiconductor device includes an active pattern, source/drain pattern, and gate structures.
• The source/drain pattern is in contact with sheet patterns and includes a first epitaxial region with antimony or bismuth.
• The first epitaxial region has a bottom part in contact with the lower pattern and a thickness that varies away from the gate structures.
• The source/drain pattern also includes a second epitaxial region with phosphorus.

Potential applications of this technology:

• This semiconductor device can be used in various electronic devices such as smartphones, tablets, and computers.
• It can be utilized in power electronics, integrated circuits, and other semiconductor-based applications.

Problems solved by this technology:

• The design of the semiconductor device allows for improved performance and functionality.
• The use of antimony or bismuth in the first epitaxial region enhances the conductivity and efficiency of the device.
• The varying thickness of the bottom part of the first epitaxial region helps optimize the device's performance.

Benefits of this technology:

• The semiconductor device offers improved conductivity and efficiency.
• It provides enhanced performance and functionality for electronic devices.
• The design allows for better control and optimization of the device's performance.

Original Abstract Submitted

A semiconductor includes an active pattern with a lower pattern and sheet patterns spaced apart from the lower pattern in a first direction, a source/drain pattern on the lower pattern, the source/drain pattern being in contact with the sheet patterns, and gate structures on opposite sides of the source/drain pattern, the gate structures being spaced apart from each other along a second direction and including gate electrodes that surround the sheet patterns, wherein the source/drain pattern includes a first epitaxial region having at least one of antimony and bismuth, the first epitaxial region having a bottom part in contact with the lower pattern, but not with the sheet patterns, and a thickness of the bottom part increasing and decreasing away from the gate structures in the second direction, and a second epitaxial region on the first epitaxial region, the second epitaxial region including phosphorus.