17679465. NANOSHEET TRANSISTOR DEVICES AND RELATED FABRICATION METHODS simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
NANOSHEET TRANSISTOR DEVICES AND RELATED FABRICATION METHODS
Organization Name
Inventor(s)
JaeHyun Park of Hwaseong-si (KR)
Mehdi Saremi of Danville CA (US)
Rebecca Park of Mountain View CA (US)
Harsono Simka of Saratoga CA (US)
NANOSHEET TRANSISTOR DEVICES AND RELATED FABRICATION METHODS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17679465 titled 'NANOSHEET TRANSISTOR DEVICES AND RELATED FABRICATION METHODS
Simplified Explanation
The patent application describes a method of forming transistor devices using a nanosheet stack on a substrate. Here is a simplified explanation of the abstract:
- The method starts by providing a nanosheet stack, which consists of multiple nanosheets, on a substrate.
- A sacrificial layer is placed between the nanosheet stack and the substrate.
- The sacrificial layer is then removed, creating an opening between the nanosheet stack and the substrate.
- An insulating material is formed on the nanosheet stack, creating a gate spacer, and in the opening, creating an isolation region.
- The method results in the formation of a transistor device with a nanosheet stack, gate spacer, and isolation region.
Potential applications of this technology:
- Transistor devices are fundamental components of electronic devices such as computers, smartphones, and other electronic systems.
- This method can be used to fabricate high-performance transistors with improved electrical characteristics.
- The technology can be applied in the semiconductor industry for the production of advanced integrated circuits.
Problems solved by this technology:
- The method addresses the challenge of forming transistor devices with nanosheet stacks, which offer improved performance compared to traditional planar transistor structures.
- The sacrificial layer allows for the creation of an opening, enabling the formation of gate spacers and isolation regions.
- The method provides a solution for integrating nanosheet stacks into transistor devices, which can enhance device performance and enable further miniaturization.
Benefits of this technology:
- The use of nanosheet stacks in transistor devices can result in improved electrical characteristics, such as reduced power consumption and increased speed.
- The method allows for precise formation of gate spacers and isolation regions, ensuring proper device functionality.
- The technology enables the production of advanced integrated circuits with higher performance and increased functionality.
Original Abstract Submitted
Methods of forming transistor devices are provided. A method of forming a transistor device includes providing a nanosheet stack that includes a plurality of nanosheets on a substrate. A sacrificial layer is between the nanosheet stack and the substrate. The method includes removing the sacrificial layer to form an opening between the nanosheet stack and the substrate. The method includes forming a gate spacer and an isolation region by forming an insulating material on the nanosheet stack and in the opening, respectively. Related transistor devices are also provided.
