17651329. Oxygen-Free Protection Layer Formation in Wafer Bonding Process simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)
Oxygen-Free Protection Layer Formation in Wafer Bonding Process
Organization Name
Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor(s)
Chia Cheng Chou of Keelung City (TW)
Oxygen-Free Protection Layer Formation in Wafer Bonding Process - A simplified explanation of the abstract
This abstract first appeared for US patent application 17651329 titled 'Oxygen-Free Protection Layer Formation in Wafer Bonding Process
Simplified Explanation
The patent application describes a method for bonding two wafers together and trimming the first wafer to create a recessed sidewall. A protection layer is then deposited on the first wafer, and a horizontal portion of the protection layer is removed. An interconnect structure is formed over the first wafer, which is electrically connected to integrated circuit devices in the first wafer.
- The method involves bonding two wafers together and trimming the first wafer to create a recessed sidewall.
- A protection layer is deposited on the first wafer, which includes a non-oxygen-containing material in contact with the recessed sidewall.
- A horizontal portion of the protection layer that overlaps the first wafer is removed.
- An interconnect structure is formed over the first wafer, which is electrically connected to integrated circuit devices in the first wafer.
Potential Applications
- This method can be used in the fabrication of integrated circuits and semiconductor devices.
- It can be applied in the manufacturing of microchips, sensors, and other electronic components.
Problems Solved
- The method solves the problem of creating a recessed sidewall in a wafer after bonding it to another wafer.
- It addresses the issue of protecting the recessed sidewall during subsequent processing steps.
Benefits
- The method allows for the creation of a recessed sidewall, which can be beneficial for certain device designs and applications.
- The protection layer helps to safeguard the recessed sidewall during subsequent processing, ensuring the integrity of the structure.
- The interconnect structure provides electrical connectivity to the integrated circuit devices in the first wafer, enabling their functionality.
Original Abstract Submitted
A method includes bonding a first wafer to a second wafer, and performing a trimming process on the first wafer. An edge portion of the first wafer is removed. After the trimming process, the first wafer has a first sidewall laterally recessed from a second sidewall of the second wafer. A protection layer is deposited and contacting a sidewall of the first wafer, which deposition process includes depositing a non-oxygen-containing material in contact with the first sidewall. The method further includes removing a horizontal portion of the protection layer that overlaps the first wafer, and forming an interconnect structure over the first wafer. The interconnect structure is electrically connected to integrated circuit devices in the first wafer.
