US Patent Application 18174521. GATE DRIVER AND DISPLAY DEVICE INCLUDING THE SAME simplified abstract

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GATE DRIVER AND DISPLAY DEVICE INCLUDING THE SAME

Organization Name

Samsung Display Co., Ltd.


Inventor(s)

SUNHO Kim of Seongnam-si (KR)

YOOMIN Ko of Suwon-si (KR)

Hyewon Kim of Seoul (KR)

JUCHAN Park of Seoul (KR)

PILSUK Lee of Suwon-si (KR)

CHUNG SOCK Choi of Seoul (KR)

SUNGJIN Hong of Seoul (KR)

GATE DRIVER AND DISPLAY DEVICE INCLUDING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18174521 titled 'GATE DRIVER AND DISPLAY DEVICE INCLUDING THE SAME

Simplified Explanation

The abstract describes a gate driver, which is a device used to control the switching of power transistors in electronic circuits.

  • The gate driver includes a signal generator that generates a gate signal and outputs it to a first output terminal.
  • It also includes an inverted signal generator that generates an inverted gate signal based on the gate signal and outputs it to a second output terminal.
  • The inverted signal generator consists of a first transistor (PMOS) connected between the second output terminal and a power supply terminal, and a second transistor (NMOS) connected between the first node and another power supply terminal.
  • The gate electrode of both transistors is connected to a second node, which is connected to the first output terminal.


Original Abstract Submitted

A gate driver includes: a signal generator configured to generate a gate signal, and output the gate signal to a first output terminal; and an inverted signal generator configured to generate an inverted gate signal based on the gate signal, and output the inverted gate signal to a second output terminal, wherein the inverted signal generator includes: a first transistor connected between a first node connected to the second output terminal and a first driving power supply terminal, and including a PMOS transistor; and a second transistor connected between the first node and a second driving power supply terminal, and including an NMOS transistor, and wherein a second node connected to the first output terminal is connected to a gate electrode of each of the first and second transistors.