US Patent Application 18352738. CAPACITOR, MEMORY DEVICE, AND METHOD simplified abstract
Contents
CAPACITOR, MEMORY DEVICE, AND METHOD
Organization Name
Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor(s)
Chung-Liang Cheng of Hsinchu (TW)
CAPACITOR, MEMORY DEVICE, AND METHOD - A simplified explanation of the abstract
This abstract first appeared for US patent application 18352738 titled 'CAPACITOR, MEMORY DEVICE, AND METHOD
Simplified Explanation
The patent application describes a device that includes a substrate, with two nanostructures placed on top of it.
- The first nanostructure is made of a semiconductor material and has a higher resistance.
- The second nanostructure is made of a conductor material and has a lower resistance.
Both nanostructures are positioned at the same height above the substrate but are laterally offset from each other.
- The first nanostructure is surrounded by a first gate structure, while the second nanostructure is surrounded by a second gate structure.
Original Abstract Submitted
A device includes a substrate. A first nanostructure is over the substrate, and includes a semiconductor having a first resistance. A second nanostructure is over the substrate, is offset laterally from the first nanostructure, is at about the same height above the substrate as the first nanostructure, and includes a conductor having a second resistance lower than the first resistance. A first gate structure is over and wrapped around the first nanostructure, and a second gate structure is over and wrapped around the second nanostructure.
