US Patent Application 18121456. SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME simplified abstract

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SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME

Organization Name

Samsung Electronics Co., Ltd.


Inventor(s)

Wooyong Jeon of Suwon-si (KR)

Moorym Choi of Suwon-si (KR)

SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18121456 titled 'SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME

Simplified Explanation

The patent application describes a semiconductor device with specific features and components.

  • The device includes a substrate with two regions and insulating patterns within the substrate.
  • Gate electrodes are positioned below the substrate, spaced apart from each other, and arranged in a step shape below one of the regions.
  • Gate contact plugs pass through the pad regions of the gate electrodes, extending in a perpendicular direction and overlapping the insulating patterns.
  • A peripheral contact plug is provided in the outer area of the substrate, extending from a lower level to a higher level than the substrate's lower surface.
  • The device also includes conductive patterns, including a first pattern connected to the peripheral contact plug and second patterns connected to the substrate.


Original Abstract Submitted

A semiconductor device includes a substrate including a first region and a second region; insulating patterns in the substrate; gate electrodes provided below the substrate and spaced apart from each other in a first direction that is perpendicular to a lower surface of the substrate, the gate electrodes including pad regions arranged in a step shape below the second region; gate contact plugs passing through the pad regions of the gate electrodes, extending in the first direction, and vertically overlapping the insulating patterns; and a peripheral contact plug provided in an outer area of the substrate and extending from a level lower than a level of a lowermost gate electrode of the gate electrodes to a level higher than the lower surface of the substrate; and conductive patterns including a first conductive pattern provided on and connected to the peripheral contact plug, and second conductive patterns provided on and connected to the substrate.