Samsung electronics co., ltd. (20240136327). MEMORY DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME simplified abstract
Contents
- 1 MEMORY DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 MEMORY DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
MEMORY DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
Organization Name
Inventor(s)
SEUNGDUK Baek of SUWON-SI (KR)
MEMORY DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240136327 titled 'MEMORY DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
Simplified Explanation
The semiconductor package described in the abstract includes a package substrate with a first pad, a first memory device with stacked semiconductor chips, and a chip connecting member. The first semiconductor chip has a cell structure, peripheral circuit structure, bonding pad, and input/output pad connected to the package substrate. The second semiconductor chip has a cell structure and bonding pad connected to the first bonding pad. A part of the peripheral circuit structure protrudes from the second chip's sidewall without overlapping it.
- Package substrate with first pad
- First memory device with stacked semiconductor chips
- Chip connecting member
- First semiconductor chip with cell and peripheral circuit structures, bonding pad, and input/output pad
- Second semiconductor chip with cell structure and bonding pad
- Peripheral circuit structure protruding from second chip's sidewall
Potential Applications
The technology described in this patent application could be applied in various electronic devices requiring compact and efficient memory storage solutions.
Problems Solved
This technology solves the problem of optimizing space utilization in semiconductor packages by stacking chips vertically and allowing peripheral circuit structures to protrude without overlapping.
Benefits
The benefits of this technology include increased memory capacity in a smaller footprint, improved connectivity between chips and package substrate, and enhanced overall performance of electronic devices.
Potential Commercial Applications
- Mobile devices
- Wearable technology
- Internet of Things (IoT) devices
Possible Prior Art
One possible prior art could be the use of stacked semiconductor chips in memory devices to increase storage capacity while minimizing space requirements.
Unanswered Questions
How does this technology impact power consumption in electronic devices?
The abstract does not provide information on the power consumption implications of this technology.
Are there any limitations to the number of stacked chips in this configuration?
The abstract does not mention any limitations on the number of stacked chips in this semiconductor package design.
Original Abstract Submitted
a semiconductor package includes a package substrate including a first pad; a first memory device arranged on the package substrate and including first and second semiconductor chips stacked in a vertical direction; and a first chip connecting member electrically connecting the first semiconductor chip to the package substrate. the first semiconductor chip includes a first cell structure; a first peripheral circuit structure; a first bonding pad; and a first input/output pad electrically connected to the first pad of the package substrate through the first chip connection member. the second semiconductor chip includes a second cell structure; and a second bonding pad connected to the first bonding pad. a part of the first peripheral circuit structure protrudes from a sidewall of the second semiconductor chip so as not to overlap the second semiconductor chip.
