Taiwan semiconductor manufacturing company, ltd. (20240105632). Method for Forming a Semiconductor Device Having TSV Formed Through a Silicon Interposer and a Second Silicon Substrate with Cavity Covering a Second Die simplified abstract

Method for Forming a Semiconductor Device Having TSV Formed Through a Silicon Interposer and a Second Silicon Substrate with Cavity Covering a Second Die

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Hsien-Pin Hu of Zhubei City (TW)

Chen-Hua Yu of Hsinchu (TW)

Ming-Fa Chen of Taichung City (TW)

Jing-Cheng Lin of Hsinchu (TW)

Jiun Ren Lai of Zhubei City (TW)

Yung-Chi Lin of Su-Lin City (TW)

Method for Forming a Semiconductor Device Having TSV Formed Through a Silicon Interposer and a Second Silicon Substrate with Cavity Covering a Second Die - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240105632 titled 'Method for Forming a Semiconductor Device Having TSV Formed Through a Silicon Interposer and a Second Silicon Substrate with Cavity Covering a Second Die

Simplified Explanation

The patent application describes a device with an interposer that includes a substrate with an interconnect structure formed over its top surface, through-substrate vias (TSVs) in the substrate, and two dies bonded onto the interposer.

• The device includes an interposer with a substrate and an interconnect structure.
• The interconnect structure has at least one dielectric layer with metal features.
• The substrate contains a plurality of through-substrate vias (TSVs) that are electrically coupled to the interconnect structure.
• A first die is bonded onto the interposer.
• A second die is also bonded onto the interposer, positioned under the interconnect structure.

Potential Applications

This technology could be applied in:

• High-performance computing
• Data centers
• Telecommunications

Problems Solved

This technology helps address:

• Increasing demand for higher processing speeds
• Enhanced connectivity in electronic devices
• Improved thermal management in stacked dies

Benefits

The benefits of this technology include:

• Improved electrical performance
• Enhanced signal integrity
• Increased reliability and durability of electronic devices

Potential Commercial Applications

A potential commercial application for this technology could be in:

• Semiconductor manufacturing industry

Possible Prior Art

One possible prior art for this technology could be:

• Stacked die technology in semiconductor devices

Unanswered Questions

1. How does this technology impact the overall size and form factor of electronic devices? 2. What are the potential challenges in mass production and integration of this technology into existing manufacturing processes?

Original Abstract Submitted

a device includes an interposer, which includes a substrate having a top surface. an interconnect structure is formed over the top surface of the substrate, wherein the interconnect structure includes at least one dielectric layer, and metal features in the at least one dielectric layer. a plurality of through-substrate vias (tsvs) is in the substrate and electrically coupled to the interconnect structure. a first die is over and bonded onto the interposer. a second die is bonded onto the interposer, wherein the second die is under the interconnect structure.