US Patent Application 18338125. GALLIUM NITRIDE POWER TRANSISTOR simplified abstract
Contents
GALLIUM NITRIDE POWER TRANSISTOR
Organization Name
Inventor(s)
Gilberto Curatola of Nuremberg (DE)
GALLIUM NITRIDE POWER TRANSISTOR - A simplified explanation of the abstract
- This abstract for appeared for US patent application number 18338125 Titled 'GALLIUM NITRIDE POWER TRANSISTOR'
Simplified Explanation
The abstract describes a Gallium Nitride (GaN) power transistor. It includes a buffer layer and a barrier layer, with a gate region formed on top of the barrier layer. A p-type doped GaN layer is deposited on the barrier layer at the gate region. A metal gate layer is then deposited on top of the p-type doped GaN layer, forming a Schottky barrier. The thickness of the p-type doped GaN layer, the type of metal used for the gate layer, and the p-type doping concentration of the GaN layer are determined based on a known relationship between the thickness of the pGaN Schottky gate depletion region and the p-type doping concentration and gate metal type.
Original Abstract Submitted
The present disclosure relates to a Gallium Nitride (GaN) power transistor, comprising: a buffer layer; a barrier layer deposited on the buffer layer, wherein a gate region is formed on top of the barrier layer; a p-type doped GaN layer deposited on the barrier layer at the gate region; and a metal gate layer deposited on top of the p-type doped GaN layer, wherein the metal gate layer is contacting the p-type doped GaN layer to form a Schottky barrier, wherein a thickness of the p-type doped GaN layer, a metal type of the metal gate layer and a p-type doping concentration of the p-type doped GaN layer are based on a known relationship of a pGaN Schottky gate depletion region thickness with respect to a p-type doping concentration and a gate metal type.
