18112107. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

SEMICONDUCTOR PACKAGE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

JU-YOUN Choi of Suwon-si (KR)

Seunggeol Ryu of Suwon-si (KR)

YUN SEOK Choi of Suwon-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18112107 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation

The abstract describes a semiconductor package that includes a main semiconductor chip with a certain thickness, at least one semiconductor device on one side of the chip with a smaller thickness, a molding layer covering the chip and device to expose their surfaces, redistribution substrates below and on the molding layer, and a mold via connecting the substrates.

• The semiconductor package includes a main chip and at least one smaller semiconductor device.
• A molding layer covers the chip and device, exposing their surfaces.
• Redistribution substrates are present below and on the molding layer.
• A mold via connects the redistribution substrates.

Potential Applications:

• This semiconductor package can be used in various electronic devices such as smartphones, tablets, and computers.
• It can be applied in automotive electronics, medical devices, and industrial equipment.

Problems Solved:

• The package allows for the integration of multiple semiconductor devices with different thicknesses.
• It provides protection and insulation for the semiconductor chip and devices.
• The mold via ensures reliable electrical connections between the redistribution substrates.

Benefits:

• The package enables compact and efficient integration of semiconductor devices.
• It improves the overall performance and functionality of electronic devices.
• The mold via ensures reliable and stable electrical connections, enhancing the reliability of the package.

Original Abstract Submitted

A semiconductor package comprising a main semiconductor chip having a first thickness, at least one semiconductor device on one side of the main semiconductor chip and having a second thickness less than the first thickness, a first molding layer that covers the main semiconductor chip and the semiconductor device so as to expose a top surface of the semiconductor device and to expose a top surface and a portion of a lateral surface of the main semiconductor chip, a first redistribution substrate below the first molding layer, a second redistribution substrate on the first molding layer, and a mold via that penetrates the first molding layer and connects the first redistribution substrate to the second redistribution substrate.