20240014172. VERTICALLY MOUNTED DIE GROUPS simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)
Contents
VERTICALLY MOUNTED DIE GROUPS
Organization Name
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Inventor(s)
Jen-Yuan Chang of Hsinchu (TW)
VERTICALLY MOUNTED DIE GROUPS - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240014172 titled 'VERTICALLY MOUNTED DIE GROUPS
Simplified Explanation
The patent application describes a method of fabricating a semiconductor package. Here is a simplified explanation of the abstract:
- The method involves providing a first group of dies stacked parallel to a front surface and a second group of dies parallel to another front surface.
- A base substrate structure with a lattice crystalline plane extending in a third direction is provided.
- The first group of dies is bonded to the base substrate structure, with the first edge extending in a first direction that forms a first angle with the third direction.
- The second group of dies is also bonded to the base substrate structure, with the second edge extending in a second direction that forms a second angle with the third direction.
- At least one of the first angle and the second angle is not zero.
Potential applications of this technology:
- Semiconductor packaging for electronic devices such as smartphones, tablets, and computers.
- Integrated circuits for automotive electronics, aerospace systems, and industrial automation.
Problems solved by this technology:
- Improved thermal management by allowing efficient heat dissipation from the dies.
- Enhanced electrical performance by reducing signal interference and noise.
- Increased packaging density by stacking multiple dies in a compact manner.
Benefits of this technology:
- Higher reliability and durability of semiconductor packages.
- Improved performance and efficiency of electronic devices.
- Cost-effective manufacturing process for semiconductor packages.
Original Abstract Submitted
a method of fabricating a semiconductor package includes: providing a first die group including a plurality of first dies stacked parallel to a front surface of the first die group; providing a second die group including a plurality of second dies parallel to a front surface of the second die group; providing a base substrate structure comprising a substrate characterized by a lattice crystalline plane extending in a third direction; bonding the first die group on the base substrate structure, wherein the first edge extends in a first direction, and the first direction and the third direction define a first angle; and bonding the second die group on the base substrate structure, wherein the second edge extends in a second direction, and the second direction and the third direction define a second angle, and at least one of the first angle and the second angle is not zero.
