17953401. SEMICONDUCTOR MEMORY DEVICE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR MEMORY DEVICE
Organization Name
Inventor(s)
Keon Hee Park of Suwon-si (KR)
Soo Ho Shin of Hwaseong-si (KR)
Hyeon-Woo Jang of Hwaseong-si (KR)
Dong-Sik Park of Suwon-si (KR)
Ga Eun Lee of Hwaseong-si (KR)
SEMICONDUCTOR MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17953401 titled 'SEMICONDUCTOR MEMORY DEVICE
Simplified Explanation
The abstract describes a semiconductor memory device that includes various components such as a landing pad, lower electrode, dielectric layer, upper electrode, and upper plate electrode. The upper plate electrode consists of two sub-plate electrodes, one of which is doped with boron at a higher concentration than the other.
- The semiconductor memory device has a landing pad on a substrate.
- A lower electrode is connected to the landing pad.
- A dielectric layer extends along the profile of the lower electrode.
- An upper electrode is placed on the dielectric layer.
- The upper plate electrode consists of a first sub-plate electrode and a second sub-plate electrode doped with boron.
- The boron concentration in the first sub-plate electrode is higher than that in the second sub-plate electrode.
Potential applications of this technology:
- Memory devices: This semiconductor memory device can be used in various memory applications, such as computer systems, smartphones, and other electronic devices.
Problems solved by this technology:
- Improved performance: The use of different boron concentrations in the sub-plate electrodes can enhance the performance and efficiency of the semiconductor memory device.
Benefits of this technology:
- Enhanced memory functionality: The design of the semiconductor memory device with different boron concentrations allows for improved memory functionality and performance.
- Increased efficiency: The optimized design of the memory device can lead to increased efficiency and better overall performance.
Original Abstract Submitted
A semiconductor memory device includes a landing pad on a substrate, a lower electrode on and connected to the landing pad, a dielectric layer on and extending along a profile of the lower electrode, an upper electrode on the dielectric layer, and an upper plate electrode on the upper electrode, the upper plate electrode including a first sub-plate electrode and a second sub-plate electrode doped with boron, a first concentration of the boron in the first sub-plate electrode being greater than a second concentration of the boron in the second sub-plate electrode.
