18157509. PACKAGE STRUCTURE WITH THROUGH VIAS simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

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PACKAGE STRUCTURE WITH THROUGH VIAS

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Ling-Wei Li of Hsinchu city (TW)

Jung-Hua Chang of Hsinchu (TW)

Cheng-Lin Huang of Hsinchu City (TW)

PACKAGE STRUCTURE WITH THROUGH VIAS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18157509 titled 'PACKAGE STRUCTURE WITH THROUGH VIAS

Simplified Explanation

The abstract describes a package structure for a semiconductor chip. The structure includes a conductive structure with two portions, where the second portion is wider than the first portion. A protective layer surrounds the conductive structure and the semiconductor chip, with the first portion of the conductive structure having a sidewall that extends from the second portion to the surface of the protective layer. The protective layer completely surrounds the sidewall of the first portion.

  • The package structure includes a conductive structure with two portions, one wider than the other.
  • A semiconductor chip is placed next to the conductive structure.
  • A protective layer surrounds both the conductive structure and the semiconductor chip.
  • The first portion of the conductive structure has a sidewall that extends to the surface of the protective layer.
  • The protective layer completely surrounds the sidewall of the first portion.

Potential Applications

  • Packaging of semiconductor chips in electronic devices.
  • Protection of conductive structures and semiconductor chips in various industries.

Problems Solved

  • Provides a protective layer for the conductive structure and semiconductor chip.
  • Ensures complete coverage of the sidewall of the conductive structure.
  • Helps prevent damage to the conductive structure and semiconductor chip.

Benefits

  • Enhanced protection for the conductive structure and semiconductor chip.
  • Improved reliability and durability of electronic devices.
  • Potential for increased performance and functionality of electronic devices.


Original Abstract Submitted

A package structure is provided. The package structure includes a conductive structure having a first portion and a second portion, and the second portion is wider than the first portion. The package structure also includes a semiconductor chip laterally separated from the conductive structure. The package structure further includes a protective layer laterally surrounding the conductive structure and the semiconductor chip. The first portion of the conductive structure has a sidewall extending from the second portion to a surface of the protective layer. The protective layer laterally surrounds an entirety of the sidewall of the first portion.