17986371. VERTICAL NONVOLATILE MEMORY DEVICE INCLUDING MEMORY CELL STRINGS simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
VERTICAL NONVOLATILE MEMORY DEVICE INCLUDING MEMORY CELL STRINGS
Organization Name
Inventor(s)
Keunwook Shin of Yongin-si (KR)
Kyung-Eun Byun of Seongnam-si (KR)
Changseok Lee of Gwacheon-si (KR)
VERTICAL NONVOLATILE MEMORY DEVICE INCLUDING MEMORY CELL STRINGS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17986371 titled 'VERTICAL NONVOLATILE MEMORY DEVICE INCLUDING MEMORY CELL STRINGS
Simplified Explanation
The abstract describes a vertical nonvolatile memory device that includes a channel layer, gate electrodes, spacers, and a gate insulating layer. Each gate electrode is made of metal-doped graphene.
- The device includes a channel layer that extends in one direction.
- It also includes gate electrodes and spacers that extend in a direction perpendicular to the channel layer.
- The gate electrodes and spacers are arranged alternately in the direction of the channel layer.
- A gate insulating layer is present between the channel layer and the gate electrodes.
- Each gate electrode is made of metal-doped graphene.
Potential applications of this technology:
- Nonvolatile memory devices
- Data storage systems
- Electronic devices requiring high-density memory
Problems solved by this technology:
- Improves the performance and efficiency of nonvolatile memory devices
- Enhances the storage capacity of data storage systems
- Enables the development of smaller and more compact electronic devices
Benefits of this technology:
- Increased data storage capacity
- Improved performance and efficiency
- Smaller and more compact electronic devices
Original Abstract Submitted
A vertical nonvolatile memory device may include a channel layer extending in a first direction; a plurality of gate electrodes and a plurality of spacers each extending in a second direction crossing the first direction, the plurality of gate electrodes and the plurality of spacers being alternately arranged with each other in the first direction; and a gate insulating layer extending in the first direction between the channel layer and the plurality of gate electrodes. Each of the plurality of gate electrodes may include a metal-doped graphene.
