17859411. SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
Organization Name
Inventor(s)
HYEONJEONG Hwang of Cheonan-si (KR)
MINJUNG Kim of Cheonan-si (KR)
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17859411 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
Simplified Explanation
The abstract describes a semiconductor package that includes various components such as a package substrate, semiconductor chip, heat-dissipation pattern, mold layer, redistribution layer, penetration electrode, and connection pattern. The package design allows for the exposure of the top surfaces of the heat-dissipation pattern and connection pattern through the mold layer.
- A semiconductor package with a simplified design and structure
- Package substrate serves as a foundation for other components
- First semiconductor chip is placed on the package substrate
- Heat-dissipation pattern is added on top of the semiconductor chip to dissipate heat
- First mold layer partially surrounds the semiconductor chip and heat-dissipation pattern
- Redistribution layer is placed on top of the mold layer
- Penetration electrode penetrates the mold layer and connects to the package substrate
- Connection pattern connects the redistribution layer to the penetration electrode
- Top surfaces of the heat-dissipation pattern and connection pattern are exposed through the mold layer
Potential Applications
- Electronics industry
- Semiconductor manufacturing
- Integrated circuits
Problems Solved
- Simplifies the design and structure of semiconductor packages
- Enhances heat dissipation capabilities
- Provides a reliable connection between different components
Benefits
- Improved thermal management
- Enhanced performance and reliability of semiconductor devices
- Simplified manufacturing process
Original Abstract Submitted
A semiconductor package includes: a package substrate; a first semiconductor chip disposed on the package substrate; a heat-dissipation pattern disposed on the first semiconductor chip; a first mold layer disposed on the package substrate and at least partially surrounding the first semiconductor chip and the heat-dissipation pattern; a redistribution layer disposed on the first mold layer; a penetration electrode penetrating the first mold layer and coupled to the package substrate; and a connection pattern disposed on the penetration electrode, and connecting the redistribution layer to the penetration electrode, wherein a top surface of the heat-dissipation pattern and a top surface of the connection pattern are exposed by the first mold layer.
