17581194. SEMICONDUCTOR PACKAGE INCLUDING CHIP CONNECTION STRUCTURE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR PACKAGE INCLUDING CHIP CONNECTION STRUCTURE
Organization Name
Inventor(s)
JEONGHOON Ahn of SEONGNAM-SI (KR)
SEMICONDUCTOR PACKAGE INCLUDING CHIP CONNECTION STRUCTURE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17581194 titled 'SEMICONDUCTOR PACKAGE INCLUDING CHIP CONNECTION STRUCTURE
Simplified Explanation
The abstract describes a semiconductor package that includes two semiconductor chips and a chip connection structure between them. The connection structure consists of an insertion connection structure, a recess connection structure, and a contact layer. The recess connection structure has a base and a side wall that forms a recess, where a portion of the insertion connection structure and the contact layer are located. The contact layer covers part of the bottom surface of the side wall.
- The semiconductor package includes two chips and a chip connection structure.
- The connection structure has an insertion connection structure, a recess connection structure, and a contact layer.
- The recess connection structure has a base and a side wall that forms a recess.
- Part of the insertion connection structure and the contact layer are located in the recess.
- The contact layer covers part of the bottom surface of the side wall.
Potential applications of this technology:
- Semiconductor packaging industry
- Electronics manufacturing
- Integrated circuit design
Problems solved by this technology:
- Provides a reliable and efficient connection between two semiconductor chips
- Helps to reduce signal loss and improve performance
- Enhances the overall reliability and durability of the semiconductor package
Benefits of this technology:
- Improved signal transmission between chips
- Enhanced reliability and durability of the semiconductor package
- Simplified manufacturing process for semiconductor packages
Original Abstract Submitted
A semiconductor package includes a first semiconductor chip, a second semiconductor chip on the first semiconductor chip, and a first chip connection structure disposed between the first semiconductor chip and the second semiconductor chip. The first chip connection structure includes a first insertion connection structure connected to the first semiconductor chip, a first recess connection structure connected to the second semiconductor chip, and a first contact layer interposed between the first insertion connection structure and the first recess connection structure. The first recess connection structure includes a base and a side wall which defines a recess. A portion of the first insertion connection structure is disposed in the recess. A portion of the first contact layer is disposed in the recess, and the first contact layer covers at least a portion of a bottom surface of the side wall.
