18133977. SEMICONDUCTOR DEVICES simplified abstract (Samsung Electronics Co., Ltd.)

SEMICONDUCTOR DEVICES

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Dongjin Lee of Seoul (KR)

Junhee Lim of Seoul (KR)

Kangoh Yun of Hwaseong-si (KR)

Sohyun Lee of Hwaseong-si (KR)

SEMICONDUCTOR DEVICES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18133977 titled 'SEMICONDUCTOR DEVICES

Simplified Explanation

The abstract describes a semiconductor device that includes a first isolation structure, a first gate structure, and first source/drain regions. The first isolation structure consists of an upper isolation pattern structure and a lower isolation pattern. The upper isolation pattern structure includes a first isolation pattern and a second isolation pattern that covers the sidewall of the first isolation pattern. The lower isolation pattern is formed under the upper isolation pattern structure and has a greater width than the upper isolation pattern structure.

• The semiconductor device includes a first isolation structure, first gate structure, and first source/drain regions.
• The first isolation structure consists of an upper isolation pattern structure and a lower isolation pattern.
• The upper isolation pattern structure includes a first isolation pattern and a second isolation pattern that covers the sidewall of the first isolation pattern.
• The lower isolation pattern is formed under the upper isolation pattern structure and has a greater width than the upper isolation pattern structure.

Potential Applications

• This semiconductor device can be used in various electronic devices such as smartphones, tablets, and computers.
• It can be utilized in the manufacturing of integrated circuits and microprocessors.

Problems Solved

• The first isolation structure provides improved isolation between different components of the semiconductor device.
• The upper isolation pattern structure with the second isolation pattern enhances the effectiveness of the isolation structure.
• The wider lower isolation pattern helps in achieving better isolation and reducing leakage current.

Benefits

• The semiconductor device offers improved performance and reliability due to the enhanced isolation structure.
• It allows for more efficient use of space on the substrate.
• The wider lower isolation pattern helps in reducing leakage current, leading to lower power consumption.

Original Abstract Submitted

A semiconductor device includes a first isolation structure extending through an upper portion of a substrate and defining a first active region, a first gate structure on the substrate, and first source/drain regions at upper portions of the first active region adjacent to the first gate structure. The first isolation structure includes an upper isolation pattern structure and a lower isolation pattern. The upper isolation pattern structure includes a first isolation pattern and a second isolation pattern covering a sidewall of the first isolation pattern. The lower isolation pattern is formed under and contacting the upper isolation pattern structure, and a width of the lower isolation pattern is greater than a width of the upper isolation pattern structure.