18133105. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18133105 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The abstract describes a semiconductor package that includes a redistribution substrate, a semiconductor chip, and vertical conductive structures. Each vertical conductive structure consists of a wire covered by a metal layer, with the top surface of the wire exposed.
- The semiconductor package includes a redistribution substrate, which helps in connecting the semiconductor chip to other components.
- The semiconductor chip is mounted on the redistribution substrate.
- Vertical conductive structures are present, which are spaced apart from the side surface of the semiconductor chip.
- Each vertical conductive structure consists of a wire and a metal layer covering the side surface of the wire.
- The top surface of the wire is exposed from the metal layer.
Potential Applications
- This semiconductor package can be used in various electronic devices such as smartphones, tablets, and computers.
- It can be utilized in automotive electronics, medical devices, and industrial equipment.
Problems Solved
- The semiconductor package solves the problem of connecting the semiconductor chip to other components efficiently.
- It addresses the need for reliable and compact packaging solutions for semiconductor devices.
Benefits
- The use of vertical conductive structures allows for better space utilization and compact packaging.
- The exposed top surface of the wire provides flexibility for further connections or integration with other components.
- The metal layer covering the wire enhances the conductivity and reliability of the vertical conductive structures.
Original Abstract Submitted
A semiconductor package includes a first redistribution substrate, a semiconductor chip on the first redistribution substrate, and vertical conductive structures spaced apart from a side surface of the semiconductor chip. Each of the vertical conductive structures includes a wire, and a metal layer covering a side surface of the wire. A top surface of the wire is exposed from the metal layer.