US Patent Application 18359051. SEMICONDUCTOR DEVICE WITH REDUCED LOADING EFFECT simplified abstract

SEMICONDUCTOR DEVICE WITH REDUCED LOADING EFFECT

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Wei-Lun Chen of Taipei (TW)

Li-Te Lin of Hsinchu (TW)

Chao-Hsien Huang of Tainan City (TW)

SEMICONDUCTOR DEVICE WITH REDUCED LOADING EFFECT - A simplified explanation of the abstract

This abstract first appeared for US patent application 18359051 titled 'SEMICONDUCTOR DEVICE WITH REDUCED LOADING EFFECT

Simplified Explanation

The patent application describes a method for creating a semiconductor structure using a specific etching process.

• The method involves depositing a dielectric layer on a substrate and a patterning layer on top of the dielectric layer.
• A first etching process is then performed on the patterning layer, resulting in the formation of two regions: one with a higher pattern density and another with a lower pattern density.
• A second etching process is then performed on the region with the lower pattern density, reducing the width of each block in that region.
• Finally, the dielectric layer and the substrate are etched using the blocks from both regions, resulting in the formation of multiple fin structures.

Original Abstract Submitted

The present disclosure relates to a method for forming a semiconductor structure includes depositing a dielectric layer on a substrate and depositing a patterning layer on the dielectric layer. The method also includes performing a first etching process on the patterning layer to form a first region including a first plurality of blocks at a first pattern density and a second region including a second plurality of blocks at a second pattern density that is lower than the first pattern density. The method also includes performing a second etching process on the second plurality of blocks to decrease a width of each block of the second plurality of blocks and etching the dielectric layer and the substrate using the first and second pluralities of blocks to form a plurality of fin structures.