View source for US Patent Application 17962694. SEMICONDUCTOR MEMORY DEVICE AND CONTROLLER FOR READING DATA WITH IMPROVED SPEED, AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE AND THE CONTROLLER simplified abstract

=SEMICONDUCTOR MEMORY DEVICE AND CONTROLLER FOR READING DATA WITH IMPROVED SPEED, AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE AND THE CONTROLLER=


==Organization Name==

[[:Category:SK hynix Inc.|SK hynix Inc.]]


[[Category:SK hynix Inc.]]

==Inventor(s)==

[[:Category:Sung Ho Ahn of Icheon-si Gyeonggi-do (KR)|Sung Ho Ahn of Icheon-si Gyeonggi-do (KR)]][[Category:Sung Ho Ahn of Icheon-si Gyeonggi-do (KR)]]

==SEMICONDUCTOR MEMORY DEVICE AND CONTROLLER FOR READING DATA WITH IMPROVED SPEED, AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE AND THE CONTROLLER - A simplified explanation of the abstract==


This abstract first appeared for US patent application 17962694 titled 'SEMICONDUCTOR MEMORY DEVICE AND CONTROLLER FOR READING DATA WITH IMPROVED SPEED, AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE AND THE CONTROLLER

==Simplified Explanation==

The patent application describes a semiconductor memory device that includes a memory cell array, a peripheral circuit, and a control logic.
* The memory cell array consists of multiple memory cells.
* The peripheral circuit performs read operations on selected memory cells.
* The control logic is responsible for controlling the read operations of the peripheral circuit.
* The control logic receives a read command from an external device.
* The control logic determines whether to perform a discharge operation on word lines connected to the memory cells based on the type of read command received.


==Original Abstract Submitted==

A semiconductor memory device includes a memory cell array, a peripheral circuit, and a control logic. The memory cell array includes a plurality of memory cells. The peripheral circuit performs a read operation on selected memory cells, among the plurality of memory cells. The control logic controls the read operation of the peripheral circuit in response to a read command that is received from an external device and determines whether to perform a discharge operation of word lines that are connected to the plurality of memory cells based on a type of the read command.



[[Category:G11C11/4096]]
[[Category:G11C11/408]]
[[Category:G11C11/4093]]