View source for US Patent Application 17920848. LEARNING APPARATUS, INFERENCE APPARATUS, AND PROGRAMMABLE LOGIC DEVICE DEVELOPMENT TOOLCHAIN simplified abstract

=LEARNING APPARATUS, INFERENCE APPARATUS, AND PROGRAMMABLE LOGIC DEVICE DEVELOPMENT TOOLCHAIN=


==Organization Name==

[[Mitsubishi Electric Corporation]]


==Inventor(s)==

[[Atsuhiro Mori of Chiyoda-ku, Tokyo (JP)]]


==LEARNING APPARATUS, INFERENCE APPARATUS, AND PROGRAMMABLE LOGIC DEVICE DEVELOPMENT TOOLCHAIN - A simplified explanation of the abstract==


*This abstract for appeared for US patent application  number 17920848 Titled 'LEARNING APPARATUS, INFERENCE APPARATUS, AND PROGRAMMABLE LOGIC DEVICE DEVELOPMENT TOOLCHAIN'

==Simplified Explanation==

This abstract describes a system that collects data on the usage rate of different technologies in a programmable logic apparatus development toolchain, as well as timing slack information during the technology mapping process. The system then uses this data to infer an iterative synthesis parameter that can be used to successfully complete the place and route stage in the development toolchain. This inference is done using a learned model that takes into account the resource usage rate data and timing slack information.


==Original Abstract Submitted==

A data acquisition unit acquires resource usage rate data for each technology of a programmable logic apparatus development toolchain and timing slack information during technology mapping. An inference unit outputs an iterative synthesis parameter for succeeding in place and route from the resource usage rate data for each technology and the timing slack information during the technology mapping that are acquired by the data acquisition unit using a learned model for inferring an iterative synthesis parameter given to the programmable logic apparatus development toolchain for succeeding in the place and route from the resource usage rate data for each technology and the timing slack information during the technology mapping.