View source for Samsung electronics co., ltd. (20240096703). WAFER DICING METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES BY USING THE WAFER DICING METHOD simplified abstract

=WAFER DICING METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES BY USING THE WAFER DICING METHOD=


==Organization Name==

[[:Category:samsung electronics co., ltd.|samsung electronics co., ltd.]]


[[Category:samsung electronics co., ltd.]]

==Inventor(s)==

[[:Category:Youngchul Kwon of Suwon-si (KR)|Youngchul Kwon of Suwon-si (KR)]][[Category:Youngchul Kwon of Suwon-si (KR)]]

[[:Category:Deoksuk Jang of Suwon-Si (KR)|Deoksuk Jang of Suwon-Si (KR)]][[Category:Deoksuk Jang of Suwon-Si (KR)]]

==WAFER DICING METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES BY USING THE WAFER DICING METHOD - A simplified explanation of the abstract==


This abstract first appeared for US patent application 20240096703 titled 'WAFER DICING METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES BY USING THE WAFER DICING METHOD

==Simplified Explanation==

The wafer dicing method described in the abstract involves preparing a wafer with device forming regions and a scribe lane region, forming semiconductor devices in the device forming regions, creating inner cracks in the scribe lane region using a multiple pulse laser beam, and separating the semiconductor devices along the inner cracks.

* Explanation of the patent/innovation:
- Preparation of a wafer with device forming regions and a scribe lane region.
- Formation of semiconductor devices in the device forming regions.
- Creation of inner cracks in the scribe lane region using a multiple pulse laser beam with decreasing peak powers.
- Separation of semiconductor devices along the inner cracks.

** Potential applications of this technology:
- Semiconductor manufacturing
- Electronics industry

** Problems solved by this technology:
- Efficient and precise wafer dicing
- Minimization of damage to semiconductor devices during separation

** Benefits of this technology:
- Improved yield in semiconductor manufacturing
- Enhanced reliability of semiconductor devices

** Potential commercial applications of this technology:
- Semiconductor fabrication companies
- Electronics manufacturers

** Possible prior art:
- Traditional wafer dicing methods using mechanical saws
- Laser dicing methods with single pulse beams

### Unanswered Questions:
#### How does this method compare to traditional mechanical wafer dicing techniques?
This article does not provide a direct comparison between this laser-based method and traditional mechanical wafer dicing techniques in terms of efficiency, precision, and cost-effectiveness.

#### What are the specific parameters for creating inner cracks in the scribe lane region using the multiple pulse laser beam?
The article does not detail the specific parameters such as laser power, pulse duration, and beam alignment for creating inner cracks in the scribe lane region.


==Original Abstract Submitted==

a wafer dicing method includes preparing a wafer that includes a plurality of device forming regions and a scribe lane region that separates the plurality of device forming regions, forming a plurality of semiconductor devices in the plurality of device forming regions of the wafer, respectively, forming a plurality of inner cracks in the scribe lane region of the wafer by repeatedly irradiating a multiple pulse laser beam that includes a plurality of sub-laser beams along the scribe lane region, wherein the plurality of sub-laser beams have decreasing peak powers, and separating the plurality of semiconductor devices from each other along the plurality of inner cracks.



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